Memory I/O Priority Scheduling for Resource-Aware Read-Write Control

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Solution Overview

Problem

Existing memory systems face inefficiencies in managing data input/output operations due to varying priorities and resource allocation, leading to suboptimal performance and operational safety, particularly when handling requests with different priority levels.

Innovation Solution

A memory system and method that dynamically adjusts throughput and resource allocation based on priority levels, using a controller to manage read and write operations by classifying and buffering data requests, and employing a priority processor to allocate resources accordingly, ensuring efficient handling of requests with higher priorities while adapting to changing operating conditions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory system handles all data input/output requests equally without priority-based differentiation, then the system structure remains simple, but the data input/output performance and operational safety deteriorate due to inability to prioritize critical operations

Engineering Contradiction:
Improveoperational safetyVSAvoidsystem structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory system segments data input/output requests into different priority levels (first priority and second priority). The controller separately manages high-priority requests (such as write operations and read operations for dirty data) and low-priority requests (such as read operations for clean data), allowing critical operations to be handled preferentially without complicating the overall system architecture

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the parameter of request handling by introducing priority levels. Requests are classified based on their importance, and the controller adjusts processing behavior based on these priority parameters, enabling operational safety improvements through a straightforward priority-based mechanism rather than complex structural changes

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the memory system dynamically adjusts resource allocation based on priority levels, then the data input/output performance improves, but the control complexity increases

Engineering Contradiction:
Improvedata input/output performanceVSAvoidcontrol mechanism
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory system implements dynamic resource allocation where the controller adjusts the processing order and resource distribution based on the priority levels of incoming requests. High-priority requests receive preferential treatment in terms of processing order and resource allocation, while low-priority requests are handled when resources are available, creating a flexible and adaptive control mechanism that improves performance without excessive complexity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system employs a self-service mechanism where the controller automatically determines the processing order of requests based on their priority levels without requiring external intervention. The controller independently manages resource allocation and scheduling, dynamically adjusting to changing workload conditions while maintaining simple control logic through priority-based decision-making

Inventive Principle:
Principle #25Self-service

3Reliability

If the memory system processes high-priority requests preferentially, then the operational safety and responsiveness improve, but the processing time for low-priority requests increases

Engineering Contradiction:
Improveresponsiveness to critical operationsVSAvoidwaiting time for low-priority requests
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory system maintains continuous processing of requests by ensuring that low-priority requests are not completely blocked but are processed in the gaps between high-priority request handling. The controller continuously manages the request queue, alternating between high-priority and low-priority requests based on availability, ensuring that useful work continues without interruption while maintaining priority-based responsiveness

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The system applies partial priority action where high-priority requests receive preferential treatment in terms of processing order and resource allocation, but low-priority requests are still serviced to a sufficient degree. Rather than completely starving low-priority requests, the system provides them with adequate processing opportunities when high-priority requests are not present, balancing responsiveness with overall system throughput

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS20260072591A1Memory system for controlling read and write operations based on priorities and operation method thereof
Publication Date: 2026.03.12 SK HYNIX INC
  • US20260072591A1 patent drawing
  • US20260072591A1 patent drawing
  • US20260072591A1 patent drawing

AI summary

A memory system includes at least one memory device and a controller. The controller is coupled to the at least one memory device. The controller is configured to change a processing order of next data input/output (I/O) requests, input after plural data I/O requests, based on whether preset internal resources are allocated for processing the plural data I/O requests.