Output Buffer Control for Stable Slew Rate in Memory I/O
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Solution Overview
Problem
Semiconductor storage devices face challenges in automatically adjusting circuit constants to accommodate variations in processes, such as temperature and manufacturing tolerances, which affect the slew rate and output impedance, leading to performance inconsistencies.
Innovation Solution
The semiconductor storage device incorporates a configuration with a PMOS and NMOS output control circuit, pre-drivers, and output buffers, where first and second setting signals are generated to control the on-resistance and slew rate of the output buffers, allowing internal circuit constants to be automatically adjusted based on characteristic variations, using a Ron conversion logic circuit and calculation circuit to optimize transistor sizes and resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If circuit constants are fixed in the semiconductor storage device, then the device structure is simple and manufacturing is easier, but the slew rate and output impedance become inconsistent due to process variations
Solution Approach 1:
The patent applies dynamics by making the circuit constants adjustable rather than fixed. The output control circuit receives adjustment signals that dynamically modify the on-resistance of transistors and the slew rate of output buffers, allowing the circuit to adapt to process variations while maintaining consistent performance across different manufacturing batches.
Solution Approach 2:
The patent changes physical parameters of the circuit by introducing adjustment signals that modify the on-resistance values and slew rate characteristics. The Ron conversion logic circuit calculates appropriate resistance values, and the output control circuit applies these changes to compensate for process variations, thereby improving manufacturing precision without requiring complete redesign.
2Reliability
If the output control circuit adjusts circuit constants to compensate for process variations, then performance consistency improves, but the circuit complexity and adjustment mechanism increase
Solution Approach 1:
The patent implements feedback through the output control circuit that receives adjustment signals and modifies circuit constants accordingly. The Ron conversion logic circuit calculates the necessary adjustments based on desired output characteristics, creating a closed-loop system that automatically compensates for process variations and maintains reliable performance.
Solution Approach 2:
The circuit performs self-adjustment by using the Ron conversion logic circuit to automatically calculate appropriate resistance values and the output control circuit to apply them. This self-service mechanism compensates for process variations without requiring external intervention or complex testing equipment during manufacturing.
3Manufacturing precision
If transistor sizes are optimized to reduce on-resistance variation, then output impedance consistency improves, but the manufacturing process becomes more complex
Solution Approach 1:
The patent applies preliminary action by pre-calculating the appropriate transistor sizes and on-resistance values using the Ron conversion logic circuit before the actual output operation. This allows the circuit to be designed with standard transistor dimensions while achieving consistent performance through pre-computed adjustment parameters that compensate for manufacturing tolerances.
Data Source
AI summary
A semiconductor storage device including an output pad, a first circuit connected to the output pad, a second circuit connected to the first circuit, a third circuit configured to output a first setting signal for controlling the first circuit accordance with a characteristic variation of the first circuit, and a fourth circuit configured to generate a second setting signal for controlling the second circuit in accordance with the first setting signal received from the third circuit and output the second setting signal to the second circuit.