3D Memory Device With Isolation Structures Contacting Common Source Pillars

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Solution Overview

Problem

Current 3D memory devices face challenges in increasing memory density and array efficiency while maintaining high performance and reliability.

Innovation Solution

The method involves forming a memory device with isolation structures that directly contact common source pillars, creating separate first and second memory structures, and using a stack of conductive and insulating layers to enhance memory density and array efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory structures are separated by isolation structures that directly contact common source pillars, then memory density in unit area is increased and array efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvememory densityVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The memory device is segmented into first memory structures and second memory structures separated by isolation structures. This segmentation allows independent optimization of each memory structure while sharing common source pillars, thereby increasing memory density without proportionally increasing overall device complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Common source pillars serve multiple memory structures simultaneously, acting as shared electrical connections for both first and second memory structures. This multi-functionality reduces the total number of source pillars needed, offsetting the complexity increase from adding isolation structures.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Speed

If metal conductive layers are used instead of conventional conductive layers, then RC delay is reduced and operating speed is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveoperating speedVSAvoidmanufacturing complexity
Core Design Contradiction:
SpeedVSEase of manufacture

Solution Approach 1:

The conductive layers are changed from conventional materials to metal materials, fundamentally altering the electrical parameters (conductivity, resistance) of the memory device. This parameter change reduces RC delay and improves operating speed, despite the added complexity in metal layer deposition and patterning processes.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11638379B2Method for forming memory device
Publication Date: 2023.04.25 MACRONIX INTERNATIONAL CO LTD
  • US11638379B2 patent drawing
  • US11638379B2 patent drawing
  • US11638379B2 patent drawing

AI summary

A method for forming a memory device is provided. The memory device includes a substrate; a stack including a plurality of conductive layers and a plurality of insulating layers being alternatively stacked on the substrate; a plurality of memory structures formed on the substrate and penetrating the stack; a plurality of isolation structures formed on the substrate and penetrating the stack, wherein the isolation structures dividing the memory structures into a plurality of first memory structures and a plurality of second memory structures; and a plurality of common source pillars formed on the substrate and penetrating the stack, wherein the common source pillars directly contact the isolation structures.