Semiconductor Memory Device ISPP Programming Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices face challenges in efficiently programming and verifying memory cells, particularly in ensuring that threshold voltages are increased to target levels, which affects data retention and programming reliability.
Innovation Solution
The semiconductor memory device employs an incremental step pulse programming (ISPP) method combined with additional program operations using set program voltages to control the potential levels of bit lines, allowing for program verification and ensuring that memory cells are programmed to a target threshold voltage, thereby addressing programming failures and enhancing data storage reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ISPP method is used to program memory cells, then programming reliability is improved, but programming time increases
Solution Approach 1:
The patent applies preliminary action by performing an additional program operation after the ISPP method to ensure that memory cells that failed to reach the target threshold voltage are re-programmed. This preliminary verification and re-programming step guarantees programming reliability without significantly extending the overall programming time, as the additional operation targets only the failed cells rather than re-programming all cells.
2Reliability
If additional program operation is performed on set memory cells, then programming completeness is improved, but device complexity increases
Solution Approach 1:
The patent applies segmentation by dividing memory cells into two groups: normally programmed cells and set memory cells that require additional programming. The control logic identifies and separates these cells based on verification results, applying different programming operations to each group. This segmentation approach ensures programming completeness while managing device complexity by targeting operations only where needed rather than uniformly processing all cells.
Solution Approach 2:
The patent applies local quality by applying different programming strategies to different subsets of memory cells. Specifically, set memory cells that failed initial programming receive additional program operations with specific voltage conditions, while other cells proceed normally. This localized approach ensures that only the necessary cells receive additional attention, improving programming completeness without requiring complex system-wide changes.
3Reliability
If program verification is performed to ensure target threshold voltage, then data retention is improved, but measurement precision requirements increase
Solution Approach 1:
The patent applies feedback by implementing a verification step that measures the threshold voltage of programmed memory cells and provides feedback to the control logic. Based on this feedback, the system determines whether additional program operations are needed for cells that did not reach the target threshold voltage. This feedback mechanism ensures data retention by verifying programming success while using practical measurement thresholds rather than requiring extreme measurement precision.
Data Source
AI summary
A semiconductor memory device, a memory system including the same and an operating method thereof are set forth. The semiconductor memory device includes a memory cell array having a plurality of memory cells, peripheral circuits configured to perform a program operation using an incremental step pulse programming (ISPP) method on selected memory cells from among the plurality of memory cells. The semiconductor memory device includes an additional program using set program voltages to set memory cells, and a control logic configured to control the peripheral circuits to perform the program in the manner of the ISPP method and the additional program.