Memory System Journal Buffer for Data Integrity

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Solution Overview

Problem

Existing memory systems face challenges in managing data integrity and performance during sudden power failures, particularly in managing journal data and meta data across sequential areas, which can lead to data loss and reduced system reliability.

Innovation Solution

A memory system that includes a memory device with sequential areas, a sequential buffer for temporary data storage, a meta buffer for storing write pointer and area state information, and a memory controller that generates and updates journal data to ensure data integrity by storing critical information for restoring meta data during power failures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If meta data is frequently written to ensure data integrity during power failures, then data reliability is improved, but NAND memory performance deteriorates and device lifespan is reduced

Engineering Contradiction:
Improvedata integrityVSAvoidmemory performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent introduces a journal buffer that pre-stores meta data changes before they are committed to the sequential area. This preliminary action allows the system to prepare data integrity information in advance without immediately writing to the memory device, thus maintaining reliability while reducing write frequency and improving performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The journal buffer acts as an intermediary between the meta buffer and the sequential area. Instead of directly writing meta data to the sequential area, changes are first recorded in the journal buffer, which then manages the actual write operations. This intermediary layer reduces write frequency and extends device lifespan while maintaining data integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If meta data is frequently written to ensure data integrity during power failures, then data reliability is improved, but device lifespan is reduced

Engineering Contradiction:
Improvedata integrityVSAvoiddevice lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The journal buffer pre-stores meta data changes in memory before committing them to the sequential area. This preliminary recording allows the system to maintain data integrity information without immediately performing wear-inducing write operations to the memory device, thus extending device lifespan.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The journal buffer serves as an intermediary that decouples the frequency of meta data changes from the frequency of actual writes to the sequential area. By batching and managing writes through this intermediary, the system reduces write operations, thereby extending the memory device's operational lifespan.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If journal data is managed across the entire sequential area, then data integrity is improved, but device complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the sequential area into multiple segments, each with its own journal data managing a specific range of logical addresses. This segmentation allows the system to maintain data integrity for each segment independently, reducing the overall complexity of managing journal data across the entire sequential area.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11586379B2Memory system and method of operating the same
Publication Date: 2023.02.21 SK HYNIX INC
  • US11586379B2 patent drawing
  • US11586379B2 patent drawing
  • US11586379B2 patent drawing

AI summary

A memory system may include a memory device including at least one sequential area in which a data corresponding to consecutive logical addresses of the at least one sequential area is stored, a sequential buffer configured to temporarily store the data to be stored in the at least one sequential area, a meta buffer configured to store a meta data including a write pointer information indicating a logical address in which data is to be stored from among logical addresses corresponding to the at least one sequential area, and an area state information indicating whether the sequential buffer is allocated to the at least one sequential area, and a memory controller configured to perform a write operation of storing the data in the at least one sequential area in response to a first command received from the host using the meta data.