Memory Control Unit Key Rotation for Low-Latency Secure Erase
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory devices face challenges in quickly and securely erasing data, especially in mobile devices, where power and resource constraints require efficient erase operations that prevent data recovery by the host.
Innovation Solution
The implementation of a memory control unit that changes the encryption key used for encrypting meta-data fields and logical to physical maps during an erase operation, ensuring that data becomes unrecoverable by altering the encryption key, thereby facilitating fast and secure erasure without physical destruction of data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional physical erase operations are used to securely erase data from memory devices, then data security is improved, but erase time and latency increase significantly
Solution Approach 1:
The patent uses encryption keys as a logical copy/protection layer over the physical data. Instead of physically erasing the data, the system creates an unrecoverable encrypted copy by changing the encryption key, making the original data inaccessible while preserving the physical storage for potential future use.
Solution Approach 2:
The patent changes the encryption key parameter to achieve data erasure. By modifying the encryption key that protects the data, the system transforms accessible data into inaccessible data, achieving secure erasure without physical destruction of the stored bits.
2Productivity
If encryption key changing is used for logical erase operations, then erase speed is improved, but additional circuitry and power consumption increase
Solution Approach 1:
The encryption key management circuitry serves multiple functions: it encrypts data during write operations, decrypts data during read operations, and performs erase operations by changing keys. This multi-functionality eliminates the need for separate physical erase circuitry, reducing overall device complexity.
Solution Approach 2:
The existing encryption/decryption hardware automatically performs the erase function when instructed to change keys. The same circuitry that provides security during normal operation is reused to perform erasure, eliminating the need for additional dedicated erase circuitry.
3Reliability
If physical erase operations are performed on memory devices, then data recovery prevention is improved, but power consumption and resource usage increase
Solution Approach 1:
The patent changes the encryption key parameter to achieve data erasure. By modifying the encryption key that protects the data, the system transforms accessible data into inaccessible data, achieving secure erasure without physical destruction of the stored bits, thereby reducing power consumption.
Solution Approach 2:
The system uses encryption keys as a logical protection layer. By changing the key copy that provides access to the data, the system prevents data recovery without physically altering the stored data, reducing the energy required compared to physical erase operations.
Data Source
AI summary
A memory device comprises a memory array including memory cells, a communication interface to a host device, and a memory control unit operatively coupled to the memory array and the communication interface. The memory control unit is configured to generate a scrambler seed and a logical block address (LBA) for a block of write data received via the communication interface, scramble the block of data using the scrambler seed, encrypt the scrambler seed and the LBA using an encryption key, initiate writing a scrambled block of data and encrypted LBA and scrambler seed to the memory array, and change the encryption key in response to an erase command received via the communication interface.