Memory Controller Latch Recovery for Program State Errors

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Solution Overview

Problem

Existing RAID systems for non-volatile memory face challenges in data recovery speed and accuracy due to high processor resource usage and increased failure rates, particularly during program operation errors.

Innovation Solution

A memory system and method that utilizes a memory controller to directly recover data from latches within the memory device, reducing resource usage and disk reconstruction needs, and employs different data recovery modes based on program states to enhance speed and accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If RAID is used to recover incorrect data in non-volatile memory, then data recovery capability is provided, but processor resource occupation increases and data recovery speed decreases

Engineering Contradiction:
Improvedata recovery capabilityVSAvoiddata recovery speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the data recovery function from the external RAID system and relocates it directly into the memory device's internal latch structure. This allows the memory device to recover incorrect data independently using its own internal resources, eliminating the need for external processor intervention and thereby improving data recovery speed while maintaining reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The latch within the memory device serves as an intermediary structure that enables direct data recovery. Instead of relying on external RAID systems, the latch acts as an internal mediator that can directly access and recover incorrect data from the memory array, reducing the communication overhead and resource occupation of external processors.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If RAID is used for data recovery, then incorrect data can be recovered, but processor resource occupation increases leading to degraded performance

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidprocessor resource occupation
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The memory device is designed to perform data recovery independently using its internal latch structure without requiring external processor assistance. This self-service capability allows the memory device to recover incorrect data using its own internal resources, significantly reducing processor resource occupation and improving overall system performance.

Inventive Principle:
Principle #25Self-service

3Reliability

If RAID is used for data recovery, then data can be recovered, but time required for data transmission increases

Engineering Contradiction:
Improvedata recovery capabilityVSAvoiddata transmission time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent extracts the data recovery operation from the external RAID system and performs it directly within the memory device's internal latch. This eliminates the need for data transmission between external components, thereby reducing the time required for data recovery while maintaining the capability to recover incorrect data.

Inventive Principle:
Principle #2Taking out (Extraction)

4Reliability

If RAID is used for data recovery, then incorrect data can be recovered, but storage efficiency decreases

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidstorage system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the data recovery function with the existing memory device structure by utilizing the internal latch. Instead of requiring a separate external RAID system, the recovery capability is combined with the memory device's existing architecture, reducing overall system complexity while maintaining data recovery capability.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12613777B2Memory systems and operating methods thereof, readable storage mediums
Publication Date: 2026.04.28 YANGTZE MEMORY TECH CO LTD
  • US12613777B2 patent drawing
  • US12613777B2 patent drawing
  • US12613777B2 patent drawing

AI summary

Some examples of the present application provide a memory system. The memory system includes a memory device and a memory controller coupled to the memory device. The memory device includes a page buffer; the page buffer includes a latch. The memory controller is configured to in response to a program state being incorrect occurring when the memory device performs a program operation, obtain data in the latch. The memory controller is further configured to obtain at least part of recovered data with the obtained data in the latch.