Semiconductor Memory Layer Layout for Low On-Resistance Leakage Control
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Solution Overview
Problem
Existing semiconductor devices face challenges in reducing source-drain electrical resistance in the on-state while suppressing source-drain leakage current in the off-state.
Innovation Solution
The semiconductor device incorporates a base layer with specific configurations of semiconductor layers and contacts to optimize the distance and conductivity, including platinum distribution, to minimize resistance and leakage current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the source-drain distance is reduced to lower on-resistance, then the on-state electrical resistance decreases, but the off-state leakage current increases
Solution Approach 1:
The base layer is divided into multiple regions with different conductivity types (first conductivity type regions and second conductivity type regions), creating a segmented structure that allows independent optimization of different areas for low resistance and low leakage current
Solution Approach 2:
Different regions of the base layer are assigned different conductivity types to create local quality variations, where first conductivity type regions provide low resistance paths while second conductivity type regions suppress leakage current, allowing each region to perform its specific function optimally
Data Source
AI summary
A semiconductor device includes a first electrode, a first semiconductor layer located on the first electrode, a second semiconductor layer located on the first semiconductor layer, a third semiconductor layer located on the second semiconductor layer, a second electrode facing the second semiconductor layer via an insulating layer, a plurality of contacts, and a third electrode connected to the plurality of contacts. The first semiconductor layer and the third semiconductor layer are of a first conductivity type. The second semiconductor layer is of a second conductivity type. The second semiconductor layer includes a first part and second parts. Distances between the first electrode and the second parts are less than a distance between the first electrode and the first part. The contacts are located respectively in regions directly above the second parts. The contacts are connected to the second and third semiconductor layers.