Memory Protocol Layer Reset for Low-Latency Link Recovery
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Solution Overview
Problem
Existing memory systems face inefficiencies in error recovery procedures, particularly when errors occur at specific protocol layers, leading to unnecessary latency due to hardware resets that affect unrelated layers, such as resetting UFS attributes when errors are confined to the Unipro or PA layers.
Innovation Solution
Implementing a targeted reset approach that selectively resets parameters associated with the Unipro layer while maintaining UFS layer parameters, using a Link Startup Sequence (LSS) to reestablish communications links, thereby avoiding unnecessary resets of UFS attributes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a hardware reset is performed to recover from errors at the Unipro or PA layers, then communication reliability is improved, but latency increases due to unnecessary resetting of UFS layer parameters
Solution Approach 1:
The patent segments the protocol stack into distinct layers (UFS layer, Unipro layer, PA layer, PHY layer) and implements layer-specific reset operations. When an error is detected at a lower layer (Unipro or PA), only that specific layer is reset rather than performing a comprehensive hardware reset that would reset all layers including UFS. This segmentation allows targeted error recovery that maintains reliability while minimizing latency by avoiding unnecessary resets of unrelated layers.
2Stability of the object's composition
If a hardware reset is performed to reset Unipro layer parameters, then communication stability is improved, but device complexity increases due to the need to manage multiple reset modes
Solution Approach 1:
The patent implements dynamic reset management where the system can adaptively select between different reset modes (full hardware reset, selective layer reset, or parameter-only reset) based on the detected error type and location. The controller dynamically determines whether to reset only Unipro parameters, only PA parameters, or both, depending on which layer experienced the error. This dynamic approach maintains communication stability while managing complexity through intelligent decision-making rather than fixed complex hardware.
3Productivity
If selective reset of Unipro parameters is implemented to reduce latency, then productivity is improved, but measurement precision worsens due to difficulty in identifying specific error locations
Solution Approach 1:
The patent implements a feedback mechanism where the system continuously monitors communication status at each protocol layer and provides feedback about error conditions to the controller. When an error occurs, the feedback information includes the specific layer and parameter that experienced the error, enabling the controller to make informed decisions about which parameters to reset. This feedback-driven approach allows selective resetting that improves productivity while maintaining measurement precision through accurate error location identification.
Data Source
AI summary
Methods, systems, and devices for reset techniques for protocol layers of a memory system are described. A communications link may be established between a host system and the memory system. In some examples, the communications link may be based on one or more first parameters associated with a first protocol layer and one or more second parameters associated with a second protocol layer. The system may support communication (e.g., from the host system to the memory system) of an indication to reset the communications link, and the host system, the memory system, or both may reset the one or more first parameters based on communicating the indication to reset the communications link. The host system and memory system may attempt to reestablish the communications link based on resetting the one or more first parameters and maintaining the one or more second parameters.