Non-volatile Memory Word-line Leak Detection Circuit
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Solution Overview
Problem
Conventional non-volatile semiconductor memory devices require dedicated pads and switches for word-line leak detection, which obstructs smaller chip areas and prolongs detection time, especially as the distance between word-lines decreases, leading to increased likelihood of word-line leaks.
Innovation Solution
A non-volatile semiconductor memory device incorporating a leak sense circuit with a limiter circuit, booster circuit, leak reference circuit, counter, and comparator to detect word-line leaks by applying different voltages and counting logic changes in a flag signal, excluding the effect of leak currents from source/drain diffusion layers, thus eliminating the need for special detection hardware.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dedicated pads and switches are provided for word-line leak detection, then detection reliability is improved, but chip area increases and detection time is prolonged
Solution Approach 1:
The patent merges the word-line leak detection function with existing memory cell structures by utilizing shared source/drain diffusion layers and word-lines. The detection is performed by applying voltages to selected word-lines and measuring leakage currents through existing memory cell paths, eliminating the need for dedicated detection pads and switches while maintaining detection reliability
Solution Approach 2:
The patent enables existing memory cell components to serve dual purposes: normal memory operation and word-line leak detection. The same word-lines, source/drain diffusion layers, and select transistors used for data storage are also utilized for detection operations, allowing the system to perform multiple functions without additional hardware
2Reliability
If dedicated pads and switches are provided for word-line leak detection, then detection reliability is improved, but detection time is prolonged
Solution Approach 1:
The patent performs preliminary voltage applications to word-lines in systematic sequences before actual detection measurements. By pre-charging or pre-discharging selected word-lines to specific voltage levels and using preliminary test patterns, the detection process can quickly identify leaking word-lines without requiring lengthy measurement sequences for each word-line individually
Solution Approach 2:
The patent divides the detection process into segmented operations where word-lines are tested in groups or batches rather than individually. By applying voltages to multiple word-lines simultaneously and using shared measurement paths, the total detection time is reduced while maintaining the ability to identify specific leaking word-lines through pattern analysis
3Quantity of substance
If the distance between word-lines is reduced for higher integration, then mass storage capacity is improved, but word-line leak occurrence increases
Solution Approach 1:
The patent implements a self-diagnostic capability where the memory device automatically detects and identifies word-line leaks using its own internal structures and operations. By leveraging the existing memory cell architecture and control circuits, the system performs self-testing without external intervention, enabling compact high-density designs to include built-in quality assurance for detecting proximity-induced leaks
Data Source
AI summary
A limiter circuit compares a voltage of a control gate line and a set voltage, thereby switching the logic of a flag signal. A booster circuit starts or stops its operation according to the logic of the flag signal. A leak reference circuit has a function of leaking a leak reference current from the control gate line. A counter generates a first count value by counting the number of times the flag signal logic changes in a condition that a word-line transfer transistor is rendered non-conductive and a leak reference circuit is driven, while the counter generates a second count value by counting the number of times the flag signal logic changes in a condition that the word-line transfer transistor is rendered conductive and the leak reference circuit is undriven. A comparator compares the first count value and the second count value.