Memory Device Current Compensation Circuit Leakage Removal
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory devices using resistive elements face challenges in accurately reading data due to leakage currents from unselected bit lines, which can lead to incorrect voltage detection and increased power consumption when trying to mitigate these currents.
Innovation Solution
A memory device design that includes a current compensation circuit to remove leakage currents from unselected bit lines by using transistors and bleeding circuits to mirror and draw off currents, ensuring that only the sensing current from the selected memory cell is used for reading, thereby improving reading accuracy without increasing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional reading operation is used without current compensation, then the reading operation is simple, but leakage currents from unselected bit lines cause incorrect voltage detection
Solution Approach 1:
The current compensation circuit performs preliminary action by removing leakage currents from unselected bit lines before the sensing operation. The bleeding circuit draws off leakage currents that would otherwise flow into the sense amplifier, preventing incorrect voltage detection. This preliminary removal of harmful currents ensures accurate sensing without requiring complex post-processing or correction mechanisms.
Solution Approach 2:
The current compensation circuit acts as an intermediary between the unselected bit lines and the sense amplifier. By introducing this intermediate circuit with bleeding transistors, leakage currents are diverted through the compensation path rather than directly affecting the sensing operation. This mediator isolates the harmful leakage currents from the sensitive detection circuitry.
2Loss of energy
If conventional reading operation is used without current compensation, then the circuit structure is simple, but leakage currents increase power consumption
Solution Approach 1:
The bleeding circuit extracts and removes leakage currents from the main sensing path by providing a separate current path through the bleeding transistors. By taking out the harmful leakage currents before they can consume unnecessary power in the sense amplifier, the overall power consumption is reduced while maintaining a relatively simple circuit structure.
3Measurement precision
If current compensation circuit is added to remove leakage currents, then reading accuracy is improved, but the circuit complexity increases
Solution Approach 1:
The reading circuit is segmented into distinct functional blocks: the main sensing path and the separate current compensation path. The bleeding transistors form an independent current removal path that operates parallel to the sensing operation. This segmentation allows the compensation function to be added without fundamentally redesigning the entire sensing circuit, thereby limiting the increase in overall complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The current compensation circuit effectively reduces the impact of leakage currents, enhancing the accuracy of data reading operations while maintaining low power consumption by isolating the sensing current from the selected memory cell.
Implementation Method 1
a fourth transistor connected between the input terminal of the sense amplifier and the second power node, the fourth transistor configured to mirror a current of the third transistor
Data Source
AI summary
A memory device includes a plurality of memory cells connected to a plurality of word lines and a plurality of bit lines, each of the plurality of memory cells including a switching element and an information storage element connected to the switching element and containing a phase-change material, a decoder unit configured to determine a selected word line and a selected bit line connected to a selected memory cell to read data, among the plurality of memory cells, and a current compensation circuit configured to remove a leakage current from the selected word line, the leakage current corresponding to a sun of off-currents flowing in unselected bit lines, excluding the selected bit line, among the plurality of bit lines, from the selected word line.