Multi-Plane Memory Leakage Detection with Parallel Plane Indicators

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Solution Overview

Problem

Existing nonvolatile memory systems face challenges in efficiently detecting leakage currents between components, which can lead to defects and data loss, requiring significant time and resources.

Innovation Solution

Implementing plane-specific leak-detection indicator circuits with current mirrors and control circuits in a multi-plane memory structure to parallelly generate indicators, which are then analyzed to determine if leakage current exceeds a limit for each plane.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional leakage detection methods are used in nonvolatile memory systems, then leakage currents can be detected, but the detection process requires significant time and computational resources

Engineering Contradiction:
Improvedefect detection capabilityVSAvoiddetection time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory array is divided into multiple planes, and the leakage detection process is segmented accordingly. Each plane has dedicated leak-detection indicator circuits that operate independently, allowing parallel detection across multiple planes simultaneously. This segmentation enables the system to detect leakage currents in different portions of the memory array concurrently, significantly reducing total detection time while maintaining comprehensive coverage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Leak-detection indicator circuits are introduced as intermediary components between the memory cells and the analysis circuit. These indicator circuits convert leakage current information into detectable signals that can be processed more efficiently. The indicator circuits act as mediators that translate the physical leakage current into electrical signals suitable for automated analysis, reducing the computational burden on the main processing system.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If comprehensive leakage detection is performed across the entire memory array, then all defective blocks can be identified, but the resource consumption increases significantly

Engineering Contradiction:
Improvedefect detection completenessVSAvoiddetection resource consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The memory array is divided into multiple planes, and each plane is equipped with its own dedicated leak-detection indicator circuit. This segmentation allows the system to perform leakage detection in parallel across multiple planes simultaneously, reducing the total time and resources required compared to sequential detection of the entire array. Each plane can be detected independently, enabling efficient resource utilization while maintaining comprehensive coverage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Instead of directly measuring leakage currents across the entire memory array, the system creates copies of the leakage information through dedicated indicator circuits for each plane. These indicator circuits generate parallel signals that represent the leakage state of each plane, allowing the analysis circuit to process multiple planes' data simultaneously without requiring proportional increases in processing power or energy consumption.

Inventive Principle:
Principle #26Copying

3Productivity

If plane-specific leak-detection indicator circuits are implemented in parallel, then detection efficiency improves, but the device complexity increases

Engineering Contradiction:
Improvedetection efficiencyVSAvoidcircuit structure complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The leak-detection indicator circuits are designed with multi-functionality to justify their inclusion in each plane. These circuits serve multiple purposes: they detect leakage currents, provide plane-specific status information, and enable parallel processing across multiple planes. By making the indicator circuits universal components that perform multiple functions, the system achieves high detection efficiency while limiting the increase in overall device complexity through standardized, reusable circuit designs.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260066021A1Multi-plane leakage detection in nonvolatile memory
Publication Date: 2026.03.05 SANDISK TECHNOLOGIES LLC
  • US20260066021A1 patent drawing
  • US20260066021A1 patent drawing
  • US20260066021A1 patent drawing

AI summary

An apparatus includes control circuits to connect to planes of a memory array. The control circuits are configured to apply leak-detection voltages to selected blocks, each selected block located in a respective plane of the memory array, obtain a leak-detection indicator for each selected block in parallel and compare each leak-detection indicator with a reference in series.