Memory Link State Control for PCIe Thermal Throttling

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Solution Overview

Problem

As data transmission speeds increase, memory devices experience significant temperature rises, leading to potential data access errors and component damage, necessitating a balance between temperature control and transmission speed.

Innovation Solution

A link state control method that adjusts the connection state between a host system and a memory device based on detected temperature, selecting from multiple candidate link states to optimize data transmission speed while managing temperature.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data transmission speed is increased using PCIe Gen 5 standard, then transmission speed reaches 32 GB per second, but temperature of the memory device increases significantly

Engineering Contradiction:
Improvedata transmission speedVSAvoidtemperature of the memory device
Core Design Contradiction:
SpeedVSTemperature

Solution Approach 1:

The patent implements dynamic link state adjustment based on real-time temperature monitoring. The host system detects memory device temperature and dynamically switches between different PCIe link states (Gen 5, Gen 4, Gen 3, Gen 2, Gen 1) to balance performance and thermal management. This dynamic adaptation allows the system to optimize data transmission speed while preventing overheating by downgrading to lower-generation link states when temperature thresholds are exceeded.

Inventive Principle:
Principle #15Dynamics

2Productivity

If high transmission speed is maintained, then data access efficiency is improved, but data access errors and component damage may occur due to excessive temperature

Engineering Contradiction:
Improvedata access efficiencyVSAvoiddata access reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent establishes a feedback control mechanism where the host system continuously monitors memory device temperature and adjusts the PCIe link state accordingly. When temperature exceeds safe thresholds, the system receives feedback and automatically downgrades to a lower link state, thereby reducing heat generation and preventing data access errors or component damage. This closed-loop control ensures both high productivity when conditions permit and high reliability when thermal limits are approached.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS20250383777A1Link state control method and data storage system
Publication Date: 2025.12.18 ACER INC
  • US20250383777A1 patent drawing
  • US20250383777A1 patent drawing
  • US20250383777A1 patent drawing

AI summary

A link state control method and a data storage system are provided. The method includes: establishing a connection between a host system and a memory device; detecting a temperature of the memory device through the connection; and setting a link state adopted by the connection to one of a plurality of candidate link states according to the temperature.