Memory Link Training Signal Alignment Unit

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Modern memory controllers face challenges in aligning read and write signals due to shrinking design windows and increasing variations in high volume manufacturing, leading to increased circuit complexity and limited frequency scaling with DDR technology.

Innovation Solution

A signal alignment unit within the memory controller uses a finite state machine and delayed lock loops to align read and write signals by adjusting their delays, ensuring optimal positioning and minimizing the impact of manufacturing variations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If DLLs are used to center signals in the eye and recover timing margin, then signal alignment reliability is improved, but circuit area and complexity increase

Engineering Contradiction:
Improvesignal alignment reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the signal alignment process into separate training phases (coarse training and fine training) and separates different signal types (address, command, data signals) into independent alignment operations. Each phase uses specialized DLLs configured for specific signal characteristics, reducing the complexity burden on any single component while maintaining overall reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary coarse training before fine training, where coarse training establishes initial signal alignment using relaxed requirements, and fine training refines the alignment with stricter criteria. This preliminary action reduces the difficulty of subsequent fine-tuning operations and distributes the complexity across manageable training stages rather than requiring perfect alignment in a single complex operation.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If more training samples are used to test DLL settings, then measurement precision is improved, but loss of time increases

Engineering Contradiction:
ImproveDLL setting precisionVSAvoidtraining time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent segments the training process into coarse training phase with fewer samples for rapid initial alignment, followed by fine training phase with more samples for precise optimization. This segmentation allows the system to achieve acceptable precision quickly through coarse training, then invest additional time only when necessary for fine-tuning, rather than uniformly collecting maximum samples throughout the entire process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies partial action by using a limited number of training samples during coarse training to achieve sufficient alignment for subsequent fine training. The system collects more samples during fine training only when the coarse training indicates additional precision is needed, avoiding the excessive time consumption of collecting maximum samples from the outset while still achieving the required measurement precision.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS7886174B2Memory link training
Publication Date: 2011.02.08 TAHOE RES LTD
  • US7886174B2 patent drawing
  • US7886174B2 patent drawing
  • US7886174B2 patent drawing

AI summary

An apparatus and method are disclosed. In one embodiment, the apparatus trains a memory link using a signal alignment unit. The signal alignment unit aligns a read data strobe signal that is transmitted on the link with the center of a read data eye transmitted on the link. Next, the signal alignment unit aligns a receive enable signal that is transmitted on the link with the absolute time that data returns the data lines of the link a column address strobe signal is sent to the memory coupled to the link. Next, the signal alignment unit aligns a write data strobe signal transmitted on the link with the link's clock signal. Finally, the signal alignment unit aligns the center of the write data eye transmitted on the link with the write data strobe transmitted on the link.