Memory Load Generator for Consistent Bandwidth Testing

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Solution Overview

Problem

Existing electronic device testing methods are inefficient and resource-intensive, as they often require considering the attributes and characteristics of multiple master devices, leading to increased costs and variability in test results.

Innovation Solution

A system comprising a load generator and a memory controller that generates and processes memory test loads independently of master device attributes, allowing for testing of electronic devices at desired bandwidths without variations due to master device influences, using a load generator to output memory test loads and a memory controller to process them identically to actual memory access requests.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory testing is performed considering attributes and characteristics of multiple master devices, then test coverage is improved, but testing resources and time are increased

Engineering Contradiction:
Improvetest coverageVSAvoidtesting time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The load generator creates virtual copies of master device access requests rather than requiring actual master devices. These test loads replicate the characteristics and access patterns of multiple master devices, enabling comprehensive test coverage using a single testing system without the time and resource costs of coordinating multiple physical devices.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The load generator is designed to universally simulate various master device types and access patterns within a single device. It can generate diverse memory access requests representing different master device characteristics, making the testing system multi-functional without requiring multiple specialized testing setups.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If memory testing is performed with multiple master devices, then test comprehensiveness is improved, but testing cost is increased

Engineering Contradiction:
Improvetest comprehensivenessVSAvoidtesting resources
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

Instead of procuring and coordinating multiple physical master devices for testing, the system uses a load generator to create virtual representations of master device access patterns. This copying approach maintains test comprehensiveness while eliminating the need for multiple expensive physical devices and their associated coordination overhead.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The memory device performs self-testing by generating its own test loads internally through the load generator. This eliminates the need for external testing equipment and multiple master devices, allowing the device to test itself comprehensively without additional resources.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If memory testing considers variations in master device attributes, then test accuracy is improved, but test result consistency is worsened

Engineering Contradiction:
Improvetest accuracyVSAvoidtest result consistency
Core Design Contradiction:
Measurement precisionVSStability of the object's composition

Solution Approach 1:

The load generator is configured to apply specific access patterns and characteristics locally tailored to test particular memory device performance attributes. By controlling the test loads to match desired test conditions rather than varying master device characteristics, the system achieves both accurate measurement of specific parameters and consistent, repeatable results across multiple tests.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10923210B2Memory device including load generator and method of operating the same
Publication Date: 2021.02.16 SAMSUNG ELECTRONICS CO LTD
  • US10923210B2 patent drawing
  • US10923210B2 patent drawing
  • US10923210B2 patent drawing

AI summary

A memory device includes a load generator and a memory controller. The load generator outputs loads for first accesses directed to a memory, irrespective of attributes and characteristics of master devices. The load generator outputs the loads at a constant bandwidth without a change in a bandwidth for outputting the loads. The memory controller receives the loads from the load generator, or receives requests for second accesses directed to the memory from the master devices through a bus. The memory controllers processes the loads such that operations associated with the first accesses are performed in the memory, or processes the requests such that operations associated with the second accesses are performed in the memory. The memory controller processes the loads in a manner which is identical to a manner of processing the requests.