Nonvolatile Memory Device Local Unselecting Voltage Control
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Solution Overview
Problem
Unvolatile semiconductor memory devices using unipolar type ReRAM face challenges in stabilizing the resetting process, leading to reliability issues due to high current consumption and voltage reduction across memory cells, especially in larger memory cell arrays where voltage gradients affect the biased states of selected and unselected memory cells.
Innovation Solution
The implementation of a nonvolatile semiconductor memory device with a memory cell array and control circuits that apply specific unselecting voltages based on the distance from control circuits, optimizing the erasing and setting operations by stepping the unselecting word line and bit line voltages to reduce current consumption and maintain appropriate biased states across memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If unipolar type ReRAM is used for high-density memory cell array, then memory density is improved, but resetting stability deteriorates due to voltage reduction and high current consumption
Solution Approach 1:
The patent applies different unselecting voltages to different regions of the memory cell array based on their distance from the control circuit. Memory cells closer to the control circuit receive a first unselecting voltage, while those farther away receive a second unselecting voltage. This local differentiation compensates for voltage reduction effects and stabilizes the resetting process across the entire array, resolving the contradiction between high density and resetting stability.
2Quantity of substance
If larger memory cell arrays are implemented, then memory capacity is improved, but voltage gradients increase causing biased state instability
Solution Approach 1:
The patent divides the memory cell array into multiple regions with different unselecting voltage levels. By applying a first unselecting voltage to cells near the control circuit and a second unselecting voltage to cells farther away, the patent compensates for the voltage gradients that naturally occur in larger arrays. This ensures that all memory cells, regardless of their position, maintain stable biased states during read and write operations.
3Reliability
If erasing voltage is increased to ensure sufficient erasing for selected cells, then erasing effectiveness is improved, but current consumption from unselected cells increases
Solution Approach 1:
The patent applies different unselecting voltages to different regions of the memory cell array. By carefully selecting the first unselecting voltage for cells near the control circuit and the second unselecting voltage for cells farther away, the patent ensures that unselected cells remain in a stable state without requiring excessive voltage. This reduces the current consumption from unselected cells while still providing sufficient erasing voltage to the selected cells, thus resolving the contradiction between erasing effectiveness and current consumption.
Data Source
AI summary
A nonvolatile semiconductor memory device according to an embodiment includes: a memory cell array including a plurality of first lines and second lines intersecting each other and a plurality of memory cells connected at intersections of the plurality of first lines and second lines; and a first line control circuit and a second line control circuit configured to select the first lines and the second lines respectively to supply a voltage or current necessary for a resetting operation or a setting operation on the memory cells. The first line control circuit supplies unselected ones of the first lines with an unselecting voltage corresponding to the distance between the unselected first lines and the second line control circuit.