On-Chip Memory Logic Encryption for Secure IC Key Storage
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Solution Overview
Problem
Integrated circuits are vulnerable to reverse engineering and theft due to the exposure of key values during the power-on or boot-up sequence, as they are typically stored off-chip and read into on-chip registers or flip-flops, making it possible for attackers to access and exploit these values.
Innovation Solution
Incorporating logic encryption elements within the integrated circuit that utilize on-chip memory cells, such as Correlated Electron Switch (CES) memory cells, to securely store key values, ensuring the circuit functions correctly only when the correct key vector is provided, thereby preventing unauthorized access and operation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If key values are stored off-chip and read into on-chip registers during power-on sequence, then the circuit can function correctly, but the key values become exposed to attackers during the read process
Solution Approach 1:
The patent merges the key storage function with the logic circuit by integrating on-chip memory cells directly into the circuit architecture. The key values are stored in on-chip memory cells and used directly within the logic circuit without being transferred through external interfaces or registers, eliminating the exposure window during power-on sequence.
Solution Approach 2:
The patent extracts the key values from the vulnerable transfer path (off-chip storage to on-chip registers) and places them directly into on-chip memory cells that are embedded within the logic circuit. This removes the key values from the exposure-prone interface between external memory and internal logic.
2Object-affected harmful factors
If key values are stored in on-chip memory cells, then security against key extraction is improved, but the circuit complexity increases due to integration requirements
Solution Approach 1:
The on-chip memory cells serve multiple functions: they store key values for security purposes, act as part of the logic circuit functionality, and eliminate the need for separate key transfer mechanisms. This multi-functionality reduces overall system complexity despite the integration requirements.
Solution Approach 2:
By combining key storage and logic functionality into a unified on-chip structure, the patent eliminates separate components (external memory, key transfer interfaces, separate registers), thereby reducing overall system complexity despite the increased integration density required.
3Ease of operation
If key values are transferred during boot-up sequence, then the circuit can be initialized, but the transfer process creates a security window for attackers to intercept keys
Solution Approach 1:
The key values are pre-loaded into on-chip memory cells during fabrication or before the device is put into service. This preliminary action eliminates the need for key transfer during boot-up sequence, as the keys are already in place and ready for immediate use by the logic circuit.
Solution Approach 2:
The patent extracts the key transfer step from the boot-up sequence entirely by using on-chip memory cells that are already populated with key values. This eliminates the security exposure window that would otherwise exist during the key transfer and initialization process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively protects integrated circuits from theft and reverse engineering by ensuring the circuit remains locked unless the correct key vector is programmed, making it highly improbable for attackers to find the correct key values, even with systematic testing, and eliminating the need for key values to be transferred during boot-up, thus enhancing security.
Implementation Method 1
Incorporating logic encryption elements within the integrated circuit that utilize on-chip memory cells, such as Correlated Electron Switch (CES) memory cells, to securely store key values
Data Source
AI summary
A protected circuit includes a logic circuit having one or more input nodes and one or more output nodes. The logic circuit has a network of logic elements and one or more logic encryption elements. A logic encryption element includes a memory cell, such as a correlated electron switch for example, coupled with a configurable sub-circuit that is configured by a value stored in the memory cell to encrypt a signal or a signal path. A mapping of values at the one or more input nodes to values at the one or more output nodes corresponds to a desired mapping when values stored in the one or more memory cells match component values of a prescribed key vector. The memory cells may be programmed after fabrication of the circuit.