Memory-Logic Die Bonding Pad Layout for Plasma-Induced Copper Defects
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Solution Overview
Problem
The quality of bonding between semiconductor dies is degraded due to copper dissolution and precipitation during plasma treatment, leading to uneven surfaces and potential open or short circuits.
Innovation Solution
Incorporating bonding pads of different sizes, including first-type, second-type, and third-type memory-side bonding pads with varying surface areas to mitigate copper dissolution and precipitation, and using corresponding logic-side bonding pads to achieve a more uniform bonding surface.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If plasma treatment is performed to prepare bonding pads for bonding, then bonding surface cleanliness is improved, but copper dissolution and precipitation occur causing uneven surfaces and potential open or short circuits
Solution Approach 1:
The patent applies different bonding pad size configurations to different regions of the semiconductor die. Specifically, I/O bonding pads are made larger than memory bonding pads, creating local variations in bonding pad characteristics. This local differentiation allows certain pads to be more resistant to plasma-induced copper dissolution while maintaining overall bonding surface quality.
Solution Approach 2:
The patent changes the physical parameter of bonding pad size to mitigate plasma treatment effects. By varying the bonding pad dimensions (making I/O pads larger and memory pads smaller), the patent creates differential responses to plasma treatment, where larger pads experience less relative copper dissolution and precipitation, thereby maintaining surface uniformity and bonding reliability.
2Ease of manufacture
If uniform bonding pads are used across the semiconductor die, then manufacturing simplicity is maintained, but copper dissolution causes uneven bonding surfaces during plasma treatment
Solution Approach 1:
The patent implements local quality differentiation by creating two distinct types of bonding pads with different sizes across the semiconductor die. I/O bonding pads are configured with larger dimensions while memory bonding pads use smaller dimensions. This local variation in pad characteristics enables differential protection against plasma-induced copper dissolution, achieving uniform bonding surfaces despite the added manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves the quality of bonding between semiconductor dies by reducing copper-related defects, enhancing the reliability of the bonded assembly.
Implementation Method 1
plasma treating the memory side bonding pads
Implementation Method 2
chemically cleaning the memory side bonding pads
Data Source
AI summary
A semiconductor structure includes a memory die including memory-side bonding pads. The memory-side bonding pads include first-type memory-side bonding pads electrically connected to a respective one of word lines or bit lines, and second-type memory-side bonding pads electrically connected to a source layer. Each of the first-type memory-side bonding pads has a first bonding surface area, and each of the second-type memory-side bonding pads has a second bonding surface area greater than the first bonding surface area.