Memory Controller Loopback for Local Data Migration

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Solution Overview

Problem

Existing memory systems inefficiently utilize on-memory processing resources, leading to suboptimal data processing and management, particularly in secondary memory units like SSDs and HDDs, due to repeated data transformation by the memory controller.

Innovation Solution

Incorporating a loopback system within the memory system to reuse data paths for internal processing, enabling on-memory data processing without duplicating the memory controller's data transformation capabilities, and utilizing an inline decryption module to decrypt and integrity check user data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the memory controller processes data transformation for internal operations, then data processing capability is improved, but device complexity increases due to duplicating transformation capabilities

Engineering Contradiction:
Improvedata processing capabilityVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory controller is designed to perform multiple functions: it handles both external host communications and internal data processor operations. The controller reuses its existing data transformation capabilities (encryption/decryption, error correction, formatting) for both external data paths to the host and internal data paths to the data processor, eliminating the need for separate transformation hardware in the data processor

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If data transformation capabilities are duplicated in the internal processor, then on-memory processing independence is improved, but manufacturing complexity increases

Engineering Contradiction:
Improveon-memory processing independenceVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent merges the data transformation functionality into a single shared resource (the memory controller) that serves both external and internal operations. Instead of duplicating encryption engines, error correction codes, and data formatting logic in both the memory controller and data processor, the system combines these functions in the controller and provides shared access to the data processor

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If separate data paths are used for internal processing, then data processing independence is improved, but loss of time increases due to repeated data transformation

Engineering Contradiction:
Improvedata processing independenceVSAvoiddata transformation time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The system prepares data in advance by having the memory controller transform and format data into a state suitable for both external host access and internal data processor consumption. Data is pre-processed once in the controller and then efficiently distributed to multiple destinations without requiring repeated transformation operations

Inventive Principle:
Principle #10Preliminary action

4Device complexity

If the memory controller handles all data transformation, then device complexity is reduced, but productivity decreases due to single-point processing bottleneck

Engineering Contradiction:
Improvedevice complexityVSAvoiddata processing throughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent segments the data processing workflow into distinct phases: the memory controller handles data retrieval and initial transformation from non-volatile memory, while the data processor handles higher-level computational tasks. This segmentation allows parallel processing where the controller prepares data while the processor works on previously prepared data, improving overall throughput without increasing transformation complexity

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12578875B2Device internal data preparation and migration
Publication Date: 2026.03.17 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US12578875B2 patent drawing
  • US12578875B2 patent drawing
  • US12578875B2 patent drawing

AI summary

This application is directed to preparing and processing data locally in a memory system that includes a data processor, a memory controller, and a non-volatile memory (e.g., NAND flash memory). The memory system obtaining a request for processing first data. A modified form of the first data has been stored as second data in the non-volatile memory. The memory system identifies the second data stored in the non-volatile memory, and extracts the second data from the non-volatile memory. The second data is processed by the memory controller of the memory system to recover the first data, which are further provided to the data processor for processing locally within the memory system. In some embodiments, the memory controller temporarily stores the second data in a first memory and the recovered first data in a second memory from which the data processor extracts the recovered first data for further local on-memory processing.