Memory Management System for Partial Array Refresh Power Savings

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Solution Overview

Problem

Conventional memory management systems in electronic devices are not compatible with partial array refresh (PAR) functionality, leading to continuous power consumption of memory blocks regardless of usage, which limits power savings in portable devices.

Innovation Solution

A memory management system that integrates a power savings manager to selectively activate and deactivate memory blocks based on usage, utilizing a driver to manage the physical features of memory devices and hide device details from the memory allocation manager, allowing for PAR feature integration with existing operating systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory blocks are continuously refreshed to maintain data integrity, then reliability is improved, but power consumption increases

Engineering Contradiction:
Improvedata integrityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The memory management system dynamically adjusts the refresh state of memory blocks based on their usage status. When a memory block is not allocated to any application, the system deactivates its refresh functionality to save power. When allocation occurs, refresh is activated to ensure data integrity. This dynamic state transition resolves the contradiction by making refresh behavior adaptive rather than static.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system applies different refresh policies to different memory blocks based on their individual allocation status. Instead of uniformly refreshing all memory blocks, only those containing allocated data receive refresh operations. This localized approach ensures reliability for active data while eliminating unnecessary power consumption from inactive blocks.

Inventive Principle:
Principle #3Local quality

2Use of energy by moving object

If partial array refresh functionality is implemented to reduce power consumption, then energy efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidhardware complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent introduces a memory management system as an intermediary layer between the application layer and the physical memory hardware. This software-based intermediary manages the PAR functionality by tracking memory allocations and controlling refresh operations, thereby reducing the need for complex hardware logic while achieving power savings.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The memory management system performs multiple functions: it manages memory allocations, tracks usage status, controls refresh operations, and interfaces with the operating system. By making the memory management system multi-functional, the patent avoids adding separate dedicated hardware components for each function, thus reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Use of energy by moving object

If memory blocks are deactivated to save power, then energy efficiency is improved, but access time increases when reactivation is needed

Engineering Contradiction:
Improvepower consumptionVSAvoidaccess time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The memory management system performs preliminary actions by tracking memory allocations and predicting when deactivated blocks may be needed. When an application requests memory, the system proactively activates the required memory blocks before actual access occurs, minimizing the perceived access time delay while maintaining power savings during idle periods.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements feedback mechanisms by continuously monitoring memory allocation requests and usage patterns. This feedback allows the system to make informed decisions about which memory blocks to activate or deactivate, optimizing the balance between power consumption and access performance based on actual system behavior.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9170635B2Methods, systems, and devices for management of a memory system
Publication Date: 2015.10.27 MICRON TECHNOLOGY INC
  • US9170635B2 patent drawing
  • US9170635B2 patent drawing
  • US9170635B2 patent drawing

AI summary

Methods, devices, and systems for a memory management system within an electronic device are disclosed, such as those wherein the memory management system is external to and compatible with architectures of currently existing operating systems. One such memory management system may include a power savings manager configured to be invoked by a memory allocation manager. The power savings manager may also be configured to determine whether physical memory blocks should be active or inactive. Furthermore, the memory management system may include a driver configured to activate or deactivate a memory block in response to a system call from the power savings manager.