Memory Management Sorting Valid Counts for Garbage Collection

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Solution Overview

Problem

The performance of data merging operations in memory storage apparatuses is reduced when valid data is centralized in a few chip enable groups, leading to inefficient garbage collection and reduced sustained memory performance.

Innovation Solution

A memory management method that records and sorts the valid count of each physical erasing unit, remaps physical erasing units to sorted virtual blocks based on their valid counts, and selects the virtual block with the smallest total valid count for garbage collection, thereby improving the efficiency of the garbage collection operation and reducing its frequency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If valid data is centralized in a few chip enable groups, then data merging operation can be performed, but the performance of data merging operation is reduced

Engineering Contradiction:
Improvedata merging operation performanceVSAvoiddistribution of valid data across chip enable groups
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent segments the virtual blocks into multiple groups based on their valid data distribution characteristics. By dividing the chip enable groups into different categories (first chip enable groups with fewer valid data, second chip enable groups with more valid data), the system can apply different garbage collection strategies to each segment, thereby improving overall data merging performance while addressing the centralization problem.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by treating different chip enable groups differently based on their specific characteristics. Instead of uniform treatment, the system identifies local variations in valid data distribution and applies targeted garbage collection operations to each region, optimizing the data merging process for each local area while contributing to global performance improvement.

Inventive Principle:
Principle #3Local quality

2Reliability

If garbage collection operation is performed frequently, then data merging can be maintained, but sustained memory performance is reduced

Engineering Contradiction:
Improvedata merging maintenanceVSAvoidsustained memory performance
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent implements preliminary action by proactively identifying and managing virtual blocks based on their valid data characteristics before garbage collection becomes necessary. By pre-categorizing chip enable groups and virtual blocks according to their valid data distribution, the system can plan and execute garbage collection operations at optimal times, maintaining data merging reliability while minimizing the frequency of operations that would degrade sustained memory performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs feedback mechanisms by continuously monitoring the valid data distribution across chip enable groups and adjusting garbage collection strategies accordingly. The system uses feedback information about valid data characteristics to dynamically determine when and how to perform garbage collection, ensuring data merging is maintained while avoiding excessive operations that would reduce sustained memory performance.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11620072B2Memory management method, memory control circuit unit and memory storage apparatus
Publication Date: 2023.04.04 HEFEI CORE STORAGE ELECTRONICS LTD
  • US11620072B2 patent drawing
  • US11620072B2 patent drawing
  • US11620072B2 patent drawing

AI summary

A memory management method, a memory control circuit unit and a memory storage apparatus are provided. The method includes: recording a valid count of each physical erasing unit in a plurality of physical erasing units; sequentially arranging M physical erasing units corresponding to each of chip enable groups according to the valid count to form a plurality of sorted physical erasing units; remapping the physical erasing units corresponding to M virtual blocks according to the plurality of sorted physical erasing units; calculating a total number of valid counts of the remapped M virtual blocks, and sequentially arranging the remapped M virtual blocks according to the total number of valid counts to form a plurality of sorted virtual blocks; and sequentially extracting at least one of the sorted virtual blocks as a source virtual block to perform a garbage collection operation.