Memory Management for Super Physical Units in Non-Volatile Storage

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Solution Overview

Problem

Current memory management methods for rewritable non-volatile memory modules inaccurately identify unavailable physical programming units, leading to reduced available capacity due to incorrect address offset values, resulting in some units being deemed unusable.

Innovation Solution

A memory management method that records use information for each physical erasing unit, allowing for the configuration of super physical units with different address offset values for unavailable units, enabling accurate identification and increased available capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a memory management circuit records only single information for representing situations of bad physical programming units in all physical erasing units, then the device complexity is reduced, but the measurement precision of identifying bad physical programming units deteriorates

Engineering Contradiction:
Improvememory management circuit complexityVSAvoididentification accuracy of bad physical programming units
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent divides the management approach by creating separate use information records for each physical erasing unit, rather than using a single unified record. This segmentation allows each unit's bad physical programming unit information to be tracked independently with its own address offset values, improving identification accuracy while maintaining manageable complexity through structured organization.

Inventive Principle:
Principle #1Segmentation

2Ease of operation

If address offset values of different physical programming units are forced to be the same, then the ease of operation is improved, but the quantity of usable physical erasing units deteriorates

Engineering Contradiction:
Improvememory management operation simplicityVSAvoidnumber of available physical erasing units
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The patent implements dynamic address offset value assignment where each physical erasing unit can have its own specific address offset values for bad physical programming units. This dynamic approach allows the system to adapt to the actual distribution of bad units in each erasing unit, enabling more units to be used while maintaining operational simplicity through automated management by the memory management circuit.

Inventive Principle:
Principle #15Dynamics

3Device complexity

If good physical erasing units are determined based on single information recording, then the device complexity is reduced, but the reliability of capacity determination deteriorates

Engineering Contradiction:
Improveinformation recording complexityVSAvoidcapacity determination accuracy
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent implements a feedback mechanism where the memory management circuit records use information for each physical erasing unit including specific address offset values of bad physical programming units. This feedback loop allows the system to accurately identify and exclude only the actual bad units from capacity calculations, providing reliable capacity determination while maintaining manageable complexity through structured information recording.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS10579289B2Memory management method for configuring super physical units of rewritable non-volatile memory modules, memory control circuit unit and memory storage device
Publication Date: 2020.03.03 PHISON ELECTRONICS
  • US10579289B2 patent drawing
  • US10579289B2 patent drawing
  • US10579289B2 patent drawing

AI summary

A memory management method, a memory control circuit unit and a memory storage device are provided. The method includes recording use information according to each physical erasing unit of a rewritable non-volatile memory module. The method also includes configuring a plurality of super physical units. An address offset value corresponding to a first unavailable physical programming unit of a first physical erasing unit in a first super physical unit is the same as an address offset value corresponding to a first available physical programming unit of a second physical erasing unit in the first super physical unit.