Memory Controller Map Data for Compressed Write Integrity

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Solution Overview

Problem

Existing storage devices face inefficiencies in managing error detection data, leading to challenges in ensuring data integrity during compression and decompression operations.

Innovation Solution

A memory controller is equipped with an error detection circuit, data compression circuit, and map data controller to generate and manage error detection data, compression data, and map data, optimizing storage and retrieval processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If data is compressed to reduce storage requirements, then storage efficiency is improved, but data integrity management becomes more complex

Engineering Contradiction:
Improvestorage requirementsVSAvoiderror detection data management
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent combines error detection data and compression information into the existing map data structure. The map data, which already stores logical-to-physical address mappings, is extended to include error detection codes and compression metadata in the same data structure, eliminating the need for separate storage mechanisms and reducing overall system complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The map data structure is transformed into a multi-functional component that simultaneously performs address mapping, error detection, and compression management. By making the map data universal, the system handles multiple functions through a single integrated structure, reducing the number of separate components needed for compressed data management.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If error detection data is stored separately for compressed data, then data integrity is improved, but storage overhead increases

Engineering Contradiction:
Improvedata integrityVSAvoidstorage overhead
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

Error detection data is merged with map data rather than being stored separately. The map data structure is extended to include error detection codes, allowing the system to maintain data integrity while utilizing existing storage allocations for map data, thus avoiding additional storage overhead.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The map data structure serves multiple purposes: address mapping, compression information storage, and error detection. This multi-functionality eliminates the need for dedicated separate storage for error detection data, reducing overall storage overhead while maintaining reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If compression information is managed externally, then decompression accuracy is improved, but access time increases

Engineering Contradiction:
Improvedecompression accuracyVSAvoidaccess time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

Compression information is merged into the map data structure, which is already cached in the memory controller during normal operations. This integration allows the system to access compression metadata without additional external memory accesses, reducing access time while maintaining decompression accuracy through complete compression information availability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The system performs preliminary actions by pre-calculating and storing compression information in the map data structure during the compression phase. This preparation ensures that when decompression is needed, all necessary information is already available in the memory controller, eliminating the need for time-consuming external lookups.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20250348379A1Memory controller compressing and storing data, method of operating the same, and storage device including the same
Publication Date: 2025.11.13 SK HYNIX INC
  • US20250348379A1 patent drawing
  • US20250348379A1 patent drawing
  • US20250348379A1 patent drawing

AI summary

Embodiments of the present disclosure relate to a semiconductor device. According to the embodiments of the present disclosure, a memory controller is capable of efficiently managing error detection data and may include an error detection circuit configured to externally receive write data and a plurality of logical addresses corresponding to the write data, and generate error detection data corresponding to the write data, a data compression circuit configured to compress the write data to generate compression data corresponding to partial logical addresses among the plurality of logical addresses, and a map data controller configured to manage map data including a mapping relationship between the plurality of logical addresses and physical addresses of a memory device, and store physical addresses mapped to the partial logical addresses, the error detection data, and compression information related to the compression data in the map data.