Memory Substrate Mask Structure for Active Region Array Etching
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Solution Overview
Problem
The existing methods for preparing substrate structures in memory devices face difficulties in severing strip patterns, which hinders the formation of active areas on the substrate.
Innovation Solution
A method involving the formation of a first mask layer with strip patterns, a dielectric layer with sacrificial portions, and a second mask layer with through-hole patterns, allowing for layer-by-layer etching to transfer patterns and form active areas in an array, using the first and second mask layers as masks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If strip patterns are formed on the substrate and directly etched, then the process should be simple, but the strip patterns are difficult to be severed making it impossible to form active areas
Solution Approach 1:
The mask structure is segmented into multiple independent components: a first mask layer with strip patterns, a first dielectric layer with sacrificial portions, and a second mask layer with through-hole patterns. This segmentation allows each layer to perform its specific function independently, enabling the strip patterns to be properly severed while maintaining manufacturing feasibility
Solution Approach 2:
A first dielectric layer with sacrificial portions is introduced as an intermediary between the first mask layer and the second mask layer. This intermediary layer facilitates the severing process by providing sacrificial material that can be selectively removed to create through-holes, enabling the complex pattern transfer without directly modifying the strip patterns themselves
2Manufacturing precision
If multiple mask layers and dielectric layers are formed, then the strip patterns can be properly severed, but the process complexity increases
Solution Approach 1:
The first dielectric layer with sacrificial portions is formed in advance before the final etching process. This preliminary action pre-establishes the through-hole patterns that will guide the severing of strip patterns, ensuring precise active area formation while organizing the complex process into manageable sequential steps
Solution Approach 2:
The solution extends the mask structure into the vertical dimension by creating a multi-layered architecture with the first mask layer, first dielectric layer with sacrificial portions, and second mask layer. This dimensional extension allows complex pattern transfer to be achieved through vertical stacking rather than horizontal process complexity
Data Source
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AI summary
A memory, a memory substrate structure, and a preparation method for the memory substrate structure. The preparation method comprises: providing a substrate (1); forming, on the substrate (1), a first mask layer comprising a plurality of strip patterns (101) distributed at intervals, the strip-shaped patterns (101) extending along the same direction; forming a first dielectric layer (2) covering the first mask layer; forming, on the first dielectric layer (2), a plurality of sacrificial portions (203) distributed at intervals, the sacrificial portions (203) covering the strip-shaped patterns (101); filling gaps between the sacrificial portions with a second dielectric material; forming a second mask layer by removing the sacrificial portions (203) with a second dielectric (3); removing each sacrificial portion (203), and retaining the second dielectric (3) in the gaps to form a second mask layer, the area of the second mask layer corresponding to each sacrificial portion (203) forming a through hole pattern exposing the strip-shaped pattern (101); and etching into the substrate (1) layer by layer using the first mask layer and the second mask layer as masks to form a plurality of active regions arranged in an array.