Memory Mat Redundant Sense Amplifier Layout for Same-CS Bit Line Repair
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Solution Overview
Problem
Conventional semiconductor memory devices lack flexibility in repairing multiple bit lines with the same column select value, limiting the effectiveness of repair operations.
Innovation Solution
The memory array is subdivided into memory mats with sense amplifiers positioned in gaps between mats, where redundant sense amplifiers are activated separately using distinct enable signals and column select signals, allowing for simultaneous repair of multiple bit lines with the same CS value by swapping data through redundant GIO lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional repair operations are used, then single bit line repair is possible, but flexibility in repairing multiple bit lines with the same column select value is limited
Solution Approach 1:
The memory array is divided into multiple memory mats, with each mat having its own sense amplifier sets and redundant sense amplifier sets. This segmentation allows independent control of each mat's sense amplifiers through separate enable signals, enabling flexible repair of multiple bit lines with the same column select value without interfering with other bit lines in different mats.
Solution Approach 2:
The patent implements dynamic control of sense amplifiers through separate enable signals for different mat groups. The first enable signal activates sense amplifiers in first and second mats, while the second enable signal activates sense amplifiers in third and fourth mats. This dynamic, selective activation allows the system to adaptively repair multiple bit lines with the same column select value by controlling which mat groups are active at different times.
2Productivity
If redundant sense amplifiers are activated simultaneously, then multiple bit lines can be repaired, but data conflicts occur on shared GIO lines
Solution Approach 1:
The patent employs periodic, sequential activation of different mat groups through separate enable signals. First, sense amplifiers in first and second mats are activated with the first enable signal to repair bit lines with the first column select value. Then, sense amplifiers in third and fourth mats are activated with the second enable signal to repair bit lines with the second column select value. This periodic, time-separated activation allows multiple repairs without data conflicts on shared GIO lines.
Solution Approach 2:
The patent performs preliminary organization of memory mats into distinct groups with separate enable signals before repair operations begin. This preliminary structuring allows the system to pre-determine which mat groups will be activated for specific repair operations, preventing data conflicts by ensuring that only one mat group is active at any given time during repair operations.
3Adaptability or versatility
If separate enable signals are used for different mat groups, then multiple bit lines with same CS value can be repaired simultaneously, but control signal complexity increases
Solution Approach 1:
The patent implements multi-functional enable signals that can selectively activate different mat groups based on repair requirements. The first enable signal serves both first and second mats, while the second enable signal serves both third and fourth mats. This universal control approach allows a single enable signal to manage multiple mats, reducing the total number of enable signals needed while maintaining the capability to repair multiple bit lines with the same column select value.
Data Source
AI summary
Embodiments of the disclosure are drawn to apparatuses and methods for repairing multiple bit lines with a same column select value. A memory mat may be bordered by a first gap and a second gap. Each gap includes sets of sense amplifiers and a redundant sense amplifier set. The sense amplifier sets are activated by an enable signal and share a column select (CS) signal in common. The redundant sense amplifier set is activated by a redundant enable signal separate from the enable signal. In some embodiments, the redundant sense amplifier sets are coupled to a redundant CS signal which is separate from the CS signal.