Semiconductor Memory Device Mat Control Unit Overlap

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Solution Overview

Problem

The increasing integration of semiconductor devices leads to a geometric increase in the number of data input/output lines, resulting in a higher number of cell mats and mat control units, which increases current consumption and limits the number of semiconductor chips per wafer, necessitating a reduction in the number of mats and mat control units without compromising chip size or performance.

Innovation Solution

The semiconductor device groups data line groups uniformly across mats, allowing some data line groups to overlap with mat control units, reducing the number of mats and mat control units while maintaining efficient data input/output operations, and allocating a dummy mat for error correction code (ECC), thereby optimizing chip size and reducing current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the number of data input/output lines is increased to support higher integration, then the data processing capability is improved, but the number of cell mats and mat control units increases, leading to higher current consumption

Engineering Contradiction:
Improvedata processing capabilityVSAvoidcurrent consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

Multiple data line groups (first, second, third data line groups) are merged and disposed to overlap with the mat control unit, allowing shared use of the mat control unit across multiple mats. This reduces the total number of mat control units required while maintaining the ability to handle increased data throughput.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The mat control unit is designed to serve multiple functions by controlling multiple mats simultaneously through the overlapping data line groups. This multi-functional approach allows a single mat control unit to manage data operations for several mats, reducing the overall count of control units needed.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If the number of cell mats is increased to support more data lines, then the data throughput is improved, but the chip area increases, limiting the number of semiconductor chips per wafer

Engineering Contradiction:
Improvedata throughputVSAvoidchip area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

Data line groups from multiple mats are merged and disposed to overlap with the mat control unit, allowing multiple mats to share common data lines and control units. This reduces the total chip area required while maintaining high data throughput capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The data line groups are disposed in an overlapping configuration with the mat control unit, utilizing the vertical or layered dimension rather than only horizontal expansion. This three-dimensional arrangement reduces the footprint area while maintaining the necessary data paths.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If the number of mat control units is increased to control more mats, then the control capability is improved, but the device complexity increases

Engineering Contradiction:
Improvecontrol capabilityVSAvoidnumber of control units
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The mat control unit is designed as a universal controller that can manage multiple mats through the overlapping data line groups. This single multi-functional unit replaces what would otherwise require multiple dedicated control units, reducing device complexity while maintaining comprehensive control capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The control functions for multiple mats are merged into a single mat control unit that handles data line groups from multiple mats. This consolidation reduces the number of control units while preserving the ability to independently control each mat when needed.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9589605B1Semiconductor memory device with input/output line
Publication Date: 2017.03.07 MIMIRIP LLC
  • US9589605B1 patent drawing
  • US9589605B1 patent drawing
  • US9589605B1 patent drawing

AI summary

Various embodiments relate to a semiconductor device. The semiconductor device may include a plurality of mats configured to input and output the data of memory cells through a plurality of mat input/output lines. The semiconductor device may include a plurality of input/output lines coupled to the plurality of mat input/output lines and configured to input and output data. The semiconductor device may include mat control units disposed between the plurality of mats and configured to control the operations of the mats. The plurality of mat input/output lines may be grouped into a plurality of data line groups having the same characteristic, and some of the plurality of data line groups may be disposed to overlap with the mat control units.