Memory Merging Function for Disaggregated Hardware Systems
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Solution Overview
Problem
Existing memory merging functions, such as Kernel Same-page Merging (KSM), are sub-optimal for disaggregated hardware architectures like Intel Rack Scale and HyperScale Datacenter Systems, leading to unnecessary memory consumption and inefficiencies in memory handling across multiple virtual hardware assemblies.
Innovation Solution
A Memory Merging Function (MMF) that operates independently of the operating system, identifies and merges memory pages based on unique memory blade parameters and latency parameters, optimizing memory usage by releasing unnecessary memory pages and creating new shared pages with lower latency, thereby improving memory handling efficiency across disaggregated hardware systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If traditional KSM function is implemented in each operating system on virtual hardware assemblies, then memory merging functionality is provided, but system complexity increases and memory consumption becomes unnecessary due to multiple instances performing similar functions
Solution Approach 1:
The patent merges multiple distributed KSM functions into a single centralized Memory Merging Function that operates at the hardware level. This single MMF serves all virtual hardware assemblies, eliminating the need for each OS to implement its own KSM function, thereby reducing system complexity while maintaining memory merging capabilities.
Solution Approach 2:
The Memory Merging Function acts as an intermediary layer between the hardware system and the operating systems. It provides memory merging services to multiple virtual hardware assemblies without requiring the operating systems to implement their own merging logic, thus reducing redundancy and system complexity.
2Quantity of substance
If memory pages are shared between applications, then memory storage efficiency improves, but access latency increases due to additional memory blade access operations
Solution Approach 1:
The patent applies local quality by making the Memory Merging Function aware of and responsive to latency parameters specific to different memory blades. When merging memory pages, the MMF considers the latency characteristics of each memory blade and makes decisions that optimize for lower access latency while maintaining storage efficiency.
Solution Approach 2:
The system changes parameters by considering both memory blade parameters and latency parameters when making memory merging decisions. The MMF dynamically adjusts its behavior based on these parameters, selecting which memory pages to merge and where to place them to optimize both storage efficiency and access latency.
Data Source
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AI summary
A method and a Memory Merging Function "MMF" (110) for merging memory pages (130) are disclosed. A hardware system (100) comprises a set of memory blades (105, 105, 107) and a set of computing pools (102, 103, 104). At least one instance of an operating system (120) executes on the hardware system (100). The MMF (110) is independent of the operating system (120). The MMF (110) finds (A010) a first and a second memory page (131, 132). The first and second memory pages (131, 132) include identical information. The first and second memory pages are associated with at least one computing unit (140) of the computing units (140). The MMF (110) obtains (A020, A030) a respective memory blade parameter relating to memory blade of the first and second memory pages (131, 132) and a respective latency parameter relating to latency for accessing the first and second memory pages (131, 132). The MMF (110) releases (A050) at least one of the first and second memory pages (131, 132) based on the respective memory blade and latency parameters. A corresponding computer program and a carrier therefor are also disclosed.