Memory Device Message Queues for Reliable Multi-Host Transfer

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Solution Overview

Problem

Existing memory devices face unreliable multi-host communications in the absence of a TCP/IP connection, leading to uncoordinated access and increased errors in centralized storage systems, particularly in automotive applications with hardware and resource constraints.

Innovation Solution

Implementing memory devices with a controller that supports send and receive communication commands to facilitate direct data transfer between multiple host devices without a TCP/IP connection, using a memory device to read and write data between buffer locations of different host devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If memory devices use TCP/IP connection for multi-host communications, then communication reliability is improved, but device complexity and resource requirements increase

Engineering Contradiction:
Improvecommunication reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a message queue as an intermediary mechanism between host devices, allowing them to communicate through structured message passing rather than requiring direct TCP/IP connections. The message queue manages message routing, buffering, and coordination, enabling reliable communication while keeping individual host devices simpler.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The communication system is segmented into independent message queues and message units, where each queue handles specific communication channels. This segmentation allows the system to achieve reliability through structured message handling without requiring complex end-to-end TCP/IP protocols across the entire system.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If memory devices support multiple host devices with shared memory, then adaptability is improved, but coordination complexity and error rates increase

Engineering Contradiction:
Improvemulti-host support capabilityVSAvoidcoordination complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements feedback mechanisms through message queues that track message states, buffer availability, and host device statuses. This feedback enables automatic coordination between multiple hosts, managing shared memory access and reducing errors through structured communication protocols without increasing overall system complexity.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The message queue system serves multiple functions simultaneously: it manages data transmission, coordinates access to shared memory, buffers messages during peak loads, and handles error recovery. This multi-functionality enables the system to support multiple host devices with unified coordination logic rather than separate complex protocols for each interaction.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Speed

If memory devices implement direct data transfer between hosts, then communication speed is improved, but reliability in the absence of TCP/IP connection deteriorates

Engineering Contradiction:
Improvedata transfer speedVSAvoidcommunication reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent prepares message buffers and queue structures in advance, allocating memory resources before actual data transfer occurs. This preliminary action enables direct, high-speed data transfer while maintaining reliability through pre-configured error handling mechanisms and buffer management that don't require TCP/IP overhead during the actual transfer.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The message queue acts as an intermediary that enables direct data transfer while providing reliability guarantees. Messages are passed through the queue with structured protocols that ensure proper routing, acknowledgment, and error handling, achieving both high speed through direct transfer and reliability through the mediating queue structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12450180B2Memory commands for multi-host communications
Publication Date: 2025.10.21 MICRON TECHNOLOGY INC
  • US12450180B2 patent drawing
  • US12450180B2 patent drawing
  • US12450180B2 patent drawing

AI summary

Implementations described herein relate to a memory device that enables communication between multiple connected host devices. In some implementations, a memory device may receive, from a first host device in communication with the memory device, a send communication command instructing the memory device to transmit data from the first host device to at least a second host device in communication with the memory device. The memory device may receive, from the second host device, a receive communication command instructing the memory device to transmit data to the second host device from at least the first host device. The memory device may transmit a message from the first host device to the second host device based on the send communication command and the receive communication command.