Memory Metadata Buffering for Synchronized Normal Data Access

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Solution Overview

Problem

As the amount of data processed in computer systems increases, particularly due to the rise in AI and big data applications, there is a growing need for an efficient method to store and manage meta data alongside normal data in memory systems.

Innovation Solution

The proposed solution involves an operation method for a memory system that includes receiving meta data read and write commands, reading and storing meta data in a meta data buffer, and synchronizing this meta data with normal data operations, allowing for efficient storage and retrieval of meta data alongside normal data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If meta data is stored separately from normal data, then data management capability is improved, but memory space utilization deteriorates

Engineering Contradiction:
Improvedata management capabilityVSAvoidmemory space utilization
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent combines meta data and normal data into a unified memory structure where meta data is stored alongside normal data in the same memory cells. This merging approach allows the memory system to manage both data types efficiently without requiring separate storage resources, thereby improving space utilization while maintaining enhanced data management capabilities through integrated access mechanisms

Inventive Principle:
Principle #5Merging (Combining)

2Quantity of substance

If meta data is stored in the same memory as normal data, then memory space utilization is improved, but access efficiency deteriorates

Engineering Contradiction:
Improvememory space utilizationVSAvoidaccess efficiency
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent segments the memory access mechanism into distinct pathways: one for normal data access and another for meta data access. By implementing separate read/write circuits and control logic for each data type, the system enables simultaneous or independent access to meta data and normal data, thereby maintaining high access efficiency despite their co-location in the same memory structure

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces intermediary control circuits that manage access requests to the unified memory structure. These intermediary components prioritize and route access requests appropriately, ensuring that meta data access does not interfere with normal data access performance, thus maintaining overall access efficiency while utilizing shared memory space

Inventive Principle:
Principle #24Intermediary (Mediator)

3Speed

If a separate meta data buffer is introduced, then meta data access speed is improved, but device complexity increases

Engineering Contradiction:
Improvemeta data access speedVSAvoidbuffer structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent designs the buffer structure to serve multiple functions: it can store both meta data and normal data, act as a cache for read operations, and function as a write-back buffer. This multi-functional buffer reduces the need for separate dedicated buffers for each data type, thereby improving meta data access speed while limiting the increase in overall device complexity through resource sharing

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12346598B2Memory storing meta data and operation method of memory
Publication Date: 2025.07.01 SK HYNIX INC
  • US12346598B2 patent drawing
  • US12346598B2 patent drawing
  • US12346598B2 patent drawing

AI summary

An operation method of a memory may include receiving a meta data read command and a first address; reading meta data from memory cells in columns corresponding to the first address and storing the read meta data in a meta data buffer; receiving a normal read command and a second address; reading normal read data from memory cells in columns corresponding to the second address; and outputting the normal read data and a part of the meta data stored in the meta data buffer.