Memory Metadata RMW Access Using Extra Column Planes

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Solution Overview

Problem

Existing semiconductor memory devices face challenges in storing error correction information and metadata without increasing the physical size of the memory array, while ensuring that non-accessed bit lines are not inadvertently modified during write operations.

Innovation Solution

Implementing a read/modify/write (RMW) cycle to protect non-accessed bit lines by using column sub-select bits to determine which bits are modified, allowing data, metadata, and parity to be accessed in a single pass, with metadata stored in an extra column plane and parity in non-selected data column planes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If metadata is stored in the array along with associated data, then information storage capability is improved, but access performance deteriorates due to increased complexity of access operations

Engineering Contradiction:
Improveinformation storage capabilityVSAvoidaccess performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The memory array is segmented into data region and metadata region, with separate column planes for each. Data is stored in selected portions of column planes while metadata is stored in an extra column plane. This segmentation allows independent access to data and metadata, improving access performance while maintaining enhanced storage capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Metadata is stored in an additional dimension (extra column plane) separate from the primary data storage column planes. This dimensional separation enables the memory device to access data and metadata simultaneously or independently without interfering with each other, thus maintaining access performance while increasing information storage capability.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Device complexity

If non-accessed bit lines are not protected during write operations, then device complexity is reduced, but data integrity deteriorates due to potential inadvertent modification

Engineering Contradiction:
Improvedevice complexityVSAvoiddata integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

Before writing metadata to selected bit lines, the system performs a preliminary read of the extra column plane to capture the current state of all bit lines including non-accessed ones. This preliminary action preserves the original data on non-accessed bit lines, preventing inadvertent modification while maintaining reasonable device complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A metadata selection circuit acts as an intermediary between the write operation and the memory array. This circuit selectively modifies only the intended metadata bit lines while leaving non-accessed bit lines unchanged, thereby protecting data integrity without significantly increasing device complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12613769B2Apparatuses and methods for read/modify/write single-pass metadata access operations
Publication Date: 2026.04.28 MICRON TECHNOLOGY INC
  • US12613769B2 patent drawing
  • US12613769B2 patent drawing
  • US12613769B2 patent drawing

AI summary

Apparatuses, systems, and methods for read/modify/write single-pass metadata access operations. During a write a memory receives data bits and at least one metadata bit and a column address which includes column select bits and column sub-select bits. A column decoder selects a set of bit lines in an extra column plane based on the column select bits and a set of bits is read out. A subset of that set of bits is selected based on the column sub-select bits and overwritten with the at least one metadata bit. The modified set of bits is written back to the extra column plane.