Memory Controller Mirror Read Repair for Uncorrectable Errors
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Solution Overview
Problem
Current data communication systems face inefficiencies in error detection and correction, particularly with uncorrectable errors, which lead to machine check conditions and hot memory replaces, limiting the use of memory structures and prolonging repair actions.
Innovation Solution
A method involving memory controllers that issue read commands from one port, reissue commands if errors are detected, and initiate repair writes from another port after verifying error-free data, allowing for address-by-address repair rather than full memory replacement, thereby reducing repair time and maintaining system availability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a hot memory replace is performed to correct uncorrectable errors, then error correction is achieved, but memory structure usage is limited and repair time is prolonged
Solution Approach 1:
The patent segments the memory repair process into two distinct phases: (1) error detection and mirror read operations, and (2) targeted repair write operations. This segmentation allows the system to perform specific address-based repairs rather than requiring complete memory structure replacement, thereby reducing repair time while maintaining reliability.
Solution Approach 2:
The patent implements preliminary error detection and mirror reading operations before initiating repair actions. By pre-reading from mirror memory structures and validating data integrity in advance, the system prepares correction data ready for immediate write-back, eliminating the need for prolonged memory unavailability and reducing overall repair time.
2Reliability
If traditional error handling is used, then uncorrectable errors are detected, but system availability is reduced due to limited memory usage
Solution Approach 1:
The patent utilizes mirror memory structures as copies of the primary memory. When uncorrectable errors are detected in the primary memory, the system reads the corresponding data from the mirror copy, validates it, and uses it for repair. This copying mechanism enables continuous system operation with improved availability while maintaining robust error detection capabilities.
Solution Approach 2:
The patent implements a strategy where corrupted data in the primary memory is discarded and replaced by recovering valid data from the mirror memory structure. This selective discarding and recovery approach allows the system to maintain high availability by quickly replacing only the affected data portions rather than shutting down for complete memory replacement.
Data Source
AI summary
Systems and methods to respond to error detection are provided. First data may be received at a first memory controller port in response to a read command issued from the first memory controller port. The read command may be issued as a second read command from a second memory controller port after determining that the first data contains a first uncorrectable error. Second data may be received at the second memory controller port in response to the second read command. A repair write command may be issued from the first memory controller port after determining that the second data does not contain any errors. The repair write command may initiate writing the second data from the first memory controller port.