Semiconductor Memory Device Mirrored Bank Read Speed

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Solution Overview

Problem

Conventional semiconductor memory devices face limitations in achieving high-speed data read and write operations due to the minimum time required between successive operations, which restricts the ability to access and read data from the same memory bank efficiently.

Innovation Solution

The semiconductor memory device employs mirrored data storage across multiple memory regions, allowing for alternate selection and reading of these regions during high-speed operations, thereby reducing the time required between successive read operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If multiple banks are used to increase operating speed, then data output capability is improved, but the minimum time between successive operations on the same bank remains constrained

Engineering Contradiction:
Improvedata output speedVSAvoidminimum time between successive operations
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The memory device is divided into multiple banks (first bank and second bank), each capable of independent operations. This segmentation allows parallel data output from different banks, improving overall data output speed while maintaining the ability to perform successive operations on the same bank through the mirroring technique

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A mirror buffer is created as a copy of the bank memory, storing identical data. When successive read operations target the same bank, the system reads from the mirror buffer instead, effectively copying the data access path to eliminate the minimum time constraint between operations

Inventive Principle:
Principle #26Copying

2Productivity

If the same memory bank is accessed repeatedly for high-speed operations, then data read frequency is improved, but the physical characteristics of the circuit limit operation speed

Engineering Contradiction:
Improvedata read frequencyVSAvoidtime for circuits to reach equilibrium
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The mirror buffer is pre-filled with identical data to the bank memory during initialization or idle periods. This preliminary action ensures that when high-frequency read operations arrive at the same bank, the mirror buffer is ready to immediately provide data without waiting for the bank to complete its equilibrium charging/discharging cycle

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The mirror buffer creates a parallel copy of the bank memory data storage structure. When repeated read operations target the same bank, the system copies the read request to the mirror buffer, which can serve these requests independently and simultaneously, thereby increasing data read frequency without being constrained by the bank's physical equilibrium time

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9263101B2Semiconductor memory device
Publication Date: 2016.02.16 MIMIRIP LLC
  • US9263101B2 patent drawing
  • US9263101B2 patent drawing
  • US9263101B2 patent drawing

AI summary

A semiconductor memory device includes first and second memory regions configured to store data in a mirrored fashion with respect to each other during a high speed operation period; and a read operation block configured to repeatedly and alternately select the first and second memory regions and read data from a selected memory region, in the case where the first or second memory region is repeatedly selected n read operations of at least two times during the high speed operation period.