Non-Volatile Memory Read Coordination for Mixed-Latency Modes
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Solution Overview
Problem
Challenges exist in accurately reading reversible resistivity memory cells, particularly MRAM cells, due to variations in threshold switching selectors and voltage drops across conductive lines, leading to reduced read margin and potential bit error rates.
Innovation Solution
Implementing a mixed current-force read scheme that includes a current-force referenced read followed by a current-force self-referenced read if the initial read is unsuccessful, using a current-force approach to compensate for variations in threshold switching selectors and voltage drops, and incorporating a mixed read coordinator to manage different read modes with separate queues and command ordering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a referenced read technique is used to read reversible resistivity memory cells, then the read operation can be performed by comparing the memory cell condition to a reference signal, but variations in threshold switching selectors and voltage drops across conductive lines reduce read margin and increase bit error rates
Solution Approach 1:
The patent introduces a current-force read operation as an intermediary measurement method. Instead of directly measuring voltage (which is affected by threshold switching variations and conductive line drops), the system forces a known current through the memory cell and measures the resulting voltage. This current-forcing approach acts as a mediator that eliminates the effects of threshold switching selector variations and conductive line voltage drops, thereby improving read accuracy and reducing bit error rates
Solution Approach 2:
The patent changes the measurement parameter from voltage-based measurement to current-based measurement. By forcing a known current through the memory cell and measuring the voltage response, the system transforms the measurement approach to be insensitive to threshold switching selector variations and conductive line voltage drops. This parameter change fundamentally resolves the read margin reduction problem while maintaining referenced read functionality
2Measurement precision
If a self-referenced read technique is used to read reversible resistivity memory cells, then read accuracy can be improved by comparing the memory cell state before and after a destructive write, but the read operation requires additional write operations increasing time consumption
Solution Approach 1:
The patent implements a selective read strategy where the current-force read operation is performed only when referenced read fails to achieve sufficient read margin. This partial application of the more time-consuming self-referenced read technique (through current-force read) optimizes the balance between read accuracy and time consumption by avoiding unnecessary additional operations when the simpler referenced read succeeds
Data Source
AI summary
When a memory system supports different read modes with different read latencies, such as reference read and self-referenced read, read data conflicts can occur for data returned from the memory cells in response to the issued read commands. To support such mixed read modes, embodiments for the memory controller can include separate queues for fast read commands and slow read commands and coordinate the issuing of the two command types. A mixed read coordinator can track issued slow read commands and determine whether a fast read command can be issued. The issued commands are ordered such that they are correctly associated with the read data returned from the memory cells.