Non-volatile Memory Mode Switching for Flash Compatibility

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Solution Overview

Problem

Existing non-volatile semiconductor memory devices, such as resistive variable memories and flash memories, lack compatibility in data processing specifications, making it difficult for external hosts to manage both types using the same specifications.

Innovation Solution

A non-volatile semiconductor memory device with a memory array that includes a selection part, an operation mode selection part, and a write control part, allowing for multiple operation modes to accommodate different data writing scenarios, enabling compatibility with various semiconductor memory devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a resistive variable memory is used to achieve low power consumption and high density, then power consumption is reduced and storage density is increased, but compatibility with flash memory specifications is lost

Engineering Contradiction:
Improvepower consumptionVSAvoidcompatibility with flash memory specification
Core Design Contradiction:
Use of energy by moving objectVSAdaptability or versatility

Solution Approach 1:

The memory device dynamically switches between two operation modes: a first mode for normal write operations and a second mode for flash-compatible operations. This dynamic adaptability allows the resistive variable memory to maintain low power consumption and high density while achieving compatibility with flash memory specifications through mode selection based on operational requirements

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The memory device is designed with multi-functionality to operate in both resistive variable memory mode and flash memory compatible mode. By incorporating an operation mode selection mechanism, the same physical memory structure can serve multiple purposes: achieving low power consumption through resistive switching while also providing flash-compatible write operations for broader system compatibility

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If flash memory write operations are used to achieve specification compatibility, then compatibility with other memory devices is improved, but power consumption increases and writing speed decreases

Engineering Contradiction:
Improvecompatibility with other semiconductor memory devicesVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The system dynamically selects the appropriate operation mode based on the required functionality. When flash memory compatibility is needed, the second operation mode is activated to perform write operations only when writing data representing a first value, otherwise prohibiting writes. When low power consumption is the priority, the first operation mode is used, allowing the system to adaptively balance compatibility requirements against power consumption constraints

Inventive Principle:
Principle #15Dynamics

3Adaptability or versatility

If flash memory write operations are used to achieve specification compatibility, then compatibility with other memory devices is improved, but writing speed decreases

Engineering Contradiction:
Improvecompatibility with other semiconductor memory devicesVSAvoidwriting speed
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The memory device dynamically adjusts its write operation characteristics based on the selected mode. In the first operation mode, fast resistive switching write operations are performed. In the second operation mode, write operations are restricted to maintain flash memory compatibility, thereby dynamically balancing writing speed against specification compatibility based on operational context

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10032512B2Non-volatile semiconductor memory device
Publication Date: 2018.07.24 WINBOND ELECTRONICS CORP
  • US10032512B2 patent drawing
  • US10032512B2 patent drawing
  • US10032512B2 patent drawing

AI summary

A non-volatile semiconductor memory device includes a memory array 20, including a plurality of memory elements; a selection part, selecting the memory elements of the memory array based on address data; a mode selection part 30, selecting any one of a RAM mode and a flash mode, where the RAM mode is a mode adapted to overwrite data of the memory element according to writing data, and the flash mode is a mode adapted to overwrite data of the memory element when the writing data is a first value and prohibit overwrite when the writing data is a second value; and a write control part, writing the writing data to the selected memory element according to the RAM mode or the flash mode selected by the mode selection part 30.