Semiconductor Memory Mode Switching for Security and Speed
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in balancing security strength and data transfer efficiency, with previous methods either offering high security but low data transfer efficiency or high data transfer efficiency but low security, and struggling to maintain confidentiality and processing speed simultaneously.
Innovation Solution
A semiconductor memory device with multiple operating modes, utilizing a memory control section that includes command decryption and data scrambling circuits, allowing for mode switching between encryption and scrambling to optimize security and performance, with the mode control circuit managing the switching and initialization of these processes to enhance security and read performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If encryption scheme is used to improve security strength, then security strength is improved, but data transfer efficiency deteriorates
Solution Approach 1:
The patent implements dynamic switching between multiple operating modes (first operating mode with command decryption for high security, second operating mode with data scrambling for high efficiency, and third operating mode with both functions enabled). This allows the system to adapt its security measures based on operational context, achieving high security when needed while maintaining high data transfer efficiency during normal operations.
Solution Approach 2:
The patent changes the operational parameters of the memory device by switching between different security processing modes. In the first operating mode, command decryption is enabled with data scrambling disabled for high security. In the second operating mode, command decryption is disabled with data scrambling enabled for high efficiency. This parameter switching resolves the contradiction between security strength and data transfer efficiency.
2Productivity
If scrambling scheme is used to improve data transfer efficiency, then data transfer efficiency is improved, but security strength deteriorates
Solution Approach 1:
The system dynamically selects between scrambling-only mode (second operating mode) for high data transfer efficiency when security requirements are lower, and encryption mode (first operating mode) when security is prioritized. The ability to switch between these modes allows the system to achieve high data transfer efficiency during normal operations while maintaining the option for high security when needed.
Solution Approach 2:
The patent changes the security processing parameters by enabling or disabling command decryption and data scrambling functions based on the operating mode. This allows the system to optimize for data transfer efficiency by using scrambling alone when appropriate, while maintaining the capability to switch to encryption mode when security strength becomes the priority.
3Speed
If one-step logic operation is used to improve processing speed, then processing speed is improved, but confidentiality deteriorates
Solution Approach 1:
The patent implements dynamic switching between simple data scrambling operations (fast processing) and complex command decryption operations (high confidentiality). The system can operate in the second operating mode with only data scrambling for fast processing when confidentiality requirements are met, or switch to the first operating mode with command decryption when high confidentiality is required, thus resolving the contradiction between processing speed and confidentiality.
Solution Approach 2:
The patent changes the complexity of security processing by switching between one-step data scrambling and multi-step command decryption processes. This parameter change allows the system to achieve fast processing speed using simple scrambling operations while maintaining the option to use more complex decryption operations when high confidentiality is required.
4Reliability
If multiple operating modes are implemented to balance security and performance, then both security strength and read performance are improved, but device complexity increases
Solution Approach 1:
The patent implements a multi-functional memory device that can operate in multiple modes (first operating mode with command decryption, second operating mode with data scrambling, and third operating mode with both functions). This multi-functionality allows a single device to provide both high security and high data transfer efficiency by selecting the appropriate mode, thereby achieving the benefits of multiple specialized devices while using only one universal device.
Solution Approach 2:
The patent merges command decryption functionality and data scrambling functionality into a single integrated memory device with a unified control mechanism. By combining these functions in one device with shared hardware resources and coordinated control, the system achieves both high security and high data transfer efficiency without the full complexity of having separate dedicated devices for each function.
Data Source
AI summary
A semiconductor memory includes a memory control section and a memory core section. A command judgment circuit in the memory control section changes the operating mode of the semiconductor memory in response to a command sent from a controller of an information processing apparatus. In a first mode, a decryption process is performed in a command decryption circuit, and data outputted from the memory core section is not scrambled. In a second mode, the decryption process is not performed in the command decryption circuit, and the command outputted from the memory core section is scrambled.