Memory Module Reduces Bonding Wires via Merged Interface
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Solution Overview
Problem
Conventional memory packaging modules with dual or multiple memory chips require numerous bonding wires, leading to increased packaging costs and potential signal interference due to complex wire routing.
Innovation Solution
A memory module design where only one memory unit is connected to the substrate via wire bonding, with the second memory unit having its functions either disabled or removed, and the two units are stacked with specific pad arrangements to reduce the number of bonding wires and enable power-saving configurations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple memory chips are connected to substrate by wire bonding, then storage capacity is increased, but packaging cost increases
Solution Approach 1:
By merging the substrate connection interface into the first memory chip, the patent reduces the complexity of packaging operations. Fewer bonding wires mean simpler manufacturing processes, lower material costs, and reduced assembly time, directly lowering packaging costs while maintaining increased storage capacity.
2Quantity of substance
If multiple memory chips are connected to substrate by wire bonding, then storage capacity is increased, but wire routing complexity increases
Solution Approach 1:
The patent combines all substrate routing operations through the first memory chip, which acts as an interface bridge. This eliminates the need for complex multi-point wire routing to the substrate, simplifying the overall wire routing architecture while supporting dual-chip storage expansion.
3Quantity of substance
If multiple memory chips are connected to substrate by wire bonding, then storage capacity is increased, but signal interference between bonding wires increases
Solution Approach 1:
By consolidating substrate connections through the first memory chip, the patent reduces the total number of bonding wires in close proximity. Fewer wires mean reduced electromagnetic interference and signal crosstalk, improving signal integrity while maintaining dual-chip storage functionality.
Data Source
AI summary
The invention provides a memory module, comprising a first memory die with a first surface and a third surface opposite to the first surface, wherein a first redistribution layer and a first original pad set are formed over the first surface; a second memory die with a second surface and a fourth surface opposite to the second surface, wherein a second original pad set are formed over the second surface; a wire bonding pad set disposed over the first surface, wherein the wire bonding pad set are electrically connected with the first original pad set; and a plurality of wires bonded to the wire bonding pad set, wherein the first memory die is bonded to the second memory die, the first surface faces the second surface, and the second original pad set are electrically connected with the wire bonding pad set.