Memory Module Data Exchange Controller Bypassing I/O Bottlenecks
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Solution Overview
Problem
The complexity of data exchange between memory systems and devices through I/O interfaces leads to inefficiencies, including high CPU and memory controller resource consumption, lower priority access for devices connected through I/O interfaces, and prolonged system recovery times due to the bottleneck of I/O interface speed and data exchange processes.
Innovation Solution
A memory module comprising volatile and non-volatile memory devices, along with a data exchange controller that manages data transfer between them, bypassing the memory controller and I/O interface, allowing direct internal data exchange and optimizing data handling through a data interface like DDR or RAMBUS.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If data exchange between memory system and devices is performed through I/O interface, then devices can access memory system, but data exchange process becomes complex and consumes CPU and memory controller resources
Solution Approach 1:
The patent extracts the data exchange control function from the CPU and memory controller, creating an independent data exchange controller within the memory module. This separates the data format transformation and exchange operations from the main system resources, allowing devices to exchange data directly with the memory module without burdening the CPU or memory controller.
Solution Approach 2:
The patent introduces a data exchange controller as an intermediary component between devices and the memory system. This mediator handles all data format transformations and exchanges between different interfaces (device interface, memory interface, and internal data exchange interface), eliminating the need for complex transformations through the I/O interface and reducing system resource consumption.
2Adaptability or versatility
If devices connected through I/O interface access memory system, then memory system can be shared, but devices have lower priority in competition and efficiency decreases
Solution Approach 1:
The patent segments the memory system into multiple independent data exchange channels: one channel for device-to-memory module data exchange and another for CPU-to-memory controller data exchange. This segmentation allows devices to access the memory system with higher priority through dedicated channels, reducing competition and improving overall data access efficiency while maintaining memory system sharing capabilities.
3Reliability
If data exchange with memory system is controlled by CPU or memory controller through I/O interface, then data exchange can be managed, but CPU and memory controller resources are consumed
Solution Approach 1:
The patent implements self-service by enabling the memory module to autonomously handle data exchange operations through its internal data exchange controller. The memory module can independently manage data format transformations and exchanges between devices and memory without requiring CPU or memory controller intervention, thereby reducing system resource consumption while maintaining reliable data exchange control.
4Use of energy by stationary object
If computing system switches from running state to sleeping state, then power consumption is reduced, but system recovery time is prolonged due to data exchange through I/O interface
Solution Approach 1:
The patent applies preliminary action by enabling data to be pre-loaded from non-volatile memory devices into volatile memory devices within the memory module before the computing system enters sleeping state. When the system wakes up, the data is already in the fast memory, eliminating the need for time-consuming data exchange operations through the I/O interface during recovery, thus reducing system recovery time while maintaining power savings.
Data Source
AI summary
The present application provides a memory module. The memory module includes one or more volatile memory devices, one or more non-volatile memory devices, and a data exchange controller. The data exchange controller controls data exchange between the volatile memory devices and the non-volatile memory devices.