Memory Module Error Pattern Injection During Refresh

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Solution Overview

Problem

Memory devices face challenges in reducing power consumption due to refresh operations, which vary with temperature and are affected by physical characteristics and arrangement positions, leading to inconsistent performance across different devices.

Innovation Solution

A memory module that injects error patterns into memory devices, allowing for automatic injection of these patterns regardless of host operations, utilizing a computing unit to detect refresh commands and write error patterns during extended refresh times, enabling error correction and coverage calculation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If refresh operation is performed to retain data in memory cell, then data retention is improved, but power consumption increases

Engineering Contradiction:
Improvedata retentionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The computing unit detects refresh commands before they are fully executed and uses this advance knowledge to schedule error pattern injection during the refresh operation. By preparing the error pattern storage and detecting refresh commands in advance, the system can inject errors without interfering with the necessary data retention function, thus maintaining reliability while managing power consumption through optimized timing.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If error pattern injection is performed during refresh operation, then error correction coverage is improved, but operation complexity increases

Engineering Contradiction:
Improveerror correction coverageVSAvoidoperation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The computing unit acts as an intermediary between the host and the memory device, detecting refresh commands and coordinating error pattern injection. This intermediary role allows the error injection mechanism to operate independently of host commands, simplifying the overall system architecture by centralizing the coordination function in the computing unit rather than requiring complex interactions between multiple components.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system uses the refresh operation itself as the mechanism to inject error patterns. The computing unit detects the refresh command and automatically triggers error pattern injection during this inherent operation, eliminating the need for separate error injection commands from the host. This self-service approach reduces operational complexity by leveraging existing operations for dual purposes.

Inventive Principle:
Principle #25Self-service

3Measurement precision

If refresh time is extended to accommodate error pattern writing, then error injection accuracy is improved, but memory access time increases

Engineering Contradiction:
Improveerror injection accuracyVSAvoidmemory access time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system exploits the periodic refresh operations of the memory device to inject error patterns. By synchronizing error pattern injection with the natural refresh cycle, the computing unit can write error patterns during the refresh time window without blocking normal memory access paths. This periodic action allows accurate error injection while minimizing impact on overall memory access performance.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The computing unit detects refresh commands in advance and prepares error pattern injection accordingly. By detecting the refresh command before it executes and using this advance knowledge to schedule the error pattern writing, the system ensures that error patterns are injected at the optimal moment during the refresh operation, maximizing accuracy while minimizing time loss through efficient timing coordination.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11531585B2Memory module and operating method
Publication Date: 2022.12.20 SAMSUNG ELECTRONICS CO LTD
  • US11531585B2 patent drawing
  • US11531585B2 patent drawing
  • US11531585B2 patent drawing

AI summary

A memory module includes a memory device configured to receive a first refresh command from a host, and perform a refresh operation in response to the first refresh command during a refresh time, and a computing unit configured to detect the first refresh command provided from the host to the memory device, and write a first error pattern at a first address of the memory device during the refresh time.