Memory Module Data Routing Across PCB Layers for Signal Quality

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Solution Overview

Problem

Conventional dual-rank DIMM designs do not account for signal quality issues arising from transitions between layers, leading to numerous reference changes that negatively affect data signaling performance.

Innovation Solution

Data signals are routed to the same memory chip along different layers of the memory module, reducing the number of reference changes and improving signal performance by using a memory controller to ensure concurrent arrival at the memory chip.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If data signals are routed on the same layer to a memory chip, then signal transmission is simplified, but numerous reference changes occur that degrade signal quality

Engineering Contradiction:
Improvesignal routing complexityVSAvoidsignal quality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent transitions from routing data signals on the same layer (2D plane) to routing them on different layers (adding the vertical dimension). Specifically, even DQ bits are routed on a first layer while odd DQ bits are routed on a second layer, eliminating the need for numerous reference changes and improving signal quality without significantly increasing routing complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If data signals are routed on different layers to reduce reference changes, then signal quality improves, but signal transmission path complexity increases

Engineering Contradiction:
Improvesignal qualityVSAvoidsignal routing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the data signal routing into distinct paths based on signal parity. Even DQ bits follow one routing path on a first layer, while odd DQ bits follow a separate routing path on a second layer. This segmentation reduces reference changes for each signal group while maintaining overall system functionality

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes the vertical layer dimension to separate signal routing paths. By routing different signal sets on different layers, the system reduces the number of reference changes needed within each signal path, thereby improving signal quality without requiring complete redesign of the routing architecture

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If conventional DIMM design is used, then manufacturing is simpler, but signal quality issues arise from layer transitions

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidsignal quality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces multi-layer routing for data signals, where even DQ bits are transmitted on a first layer and odd DQ bits on a second layer. This approach reduces reference changes and improves signal quality while remaining compatible with conventional DIMM manufacturing processes and structures

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20250279122A1Transmitting data signals on separate layers of a memory module, and related methods and apparatuses
Publication Date: 2025.09.04 LODESTAR LICENSING GROUP LLC
  • US20250279122A1 patent drawing
  • US20250279122A1 patent drawing
  • US20250279122A1 patent drawing

AI summary

Apparatuses and methods for routing and transmitting signals in an electronic device are described. An apparatus may include a printed circuit board (PCB) and circuitry. The circuitry may be configured to transmit a first set of data signals referenced to a first ground layer of the PCB and including data to be either read from or written to a single memory device. The circuitry may also be configured to transmit a second set of data signals referenced to a second, different ground layer of the PCB and including other data to be either read from or written to the single memory device.