Memory Module Passive Element Placement for Mechanical Stress Reduction
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Solution Overview
Problem
Conventional memory modules experience mechanical defects due to physical forces when inserted into sockets, particularly in the passive elements, which restrict their operational reliability and capacity.
Innovation Solution
The memory module design includes passive elements such as capacitors and resistors disposed between memory chips on a printed circuit board, arranged in a manner that reduces signal reflection and mechanical stress, with input/output pins oriented perpendicular or parallel to the chip axis, and a hub controller for managing the chips, ensuring that passive elements do not directly contact the socket.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If passive elements are disposed between tap and memory chips in conventional memory modules, then electrical connection is achieved, but mechanical defects (cracks, shorts) occur due to physical force when tap is inserted in socket
Solution Approach 1:
The patent extracts the passive elements from their conventional position between the tap and memory chips, and relocates them to be positioned between memory chips in the same column. This extraction from the high-stress insertion path eliminates the mechanical stress concentration that caused cracks and shorts during socket insertion.
Solution Approach 2:
The patent introduces memory chips as intermediary components between the tap and passive elements. By positioning passive elements between memory chips rather than directly between tap and memory chips, the memory chips serve as mechanical buffers that absorb insertion forces, protecting the fragile passive elements from direct mechanical stress.
2Reliability
If passive elements are placed between tap and memory chips, then signal transmission is enabled, but signal reflection increases and impedance characteristics deteriorate
Solution Approach 1:
The patent applies local quality by strategically positioning passive elements at specific locations between memory chips in the same column, rather than uniformly distributing them or placing them near the tap. This localized positioning optimizes impedance matching at critical signal transmission points while minimizing signal reflection effects.
Solution Approach 2:
The patent changes the spatial parameter of passive element positioning from the conventional location (between tap and memory chips) to a new location (between memory chips in the same column). This parameter change in position alters the electrical characteristics of signal lines, improving impedance matching and reducing signal reflection.
Data Source
AI summary
A memory module includes a printed circuit board; first memory chips disposed in parallel with a long axis of the printed circuit board along a first column; second memory chips disposed in parallel with the long axis of the printed circuit board along a second column; and passive elements disposed between the first memory chips and the second memory chips, wherein the passive elements are connected between input/output pins of each of the first and second memory chips and tap pins.