Memory Module Thermal Throttling via Internal Temperature Offset
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Solution Overview
Problem
Existing thermal throttling methods for semiconductor memory devices rely on external temperature sensors, which cannot accurately reflect the internal temperature of the devices, leading to increased risk of physical damage due to inexact temperature adjustments.
Innovation Solution
A memory system that includes a memory module with internal temperature measurement circuits for each semiconductor memory device, allowing for the generation of a reference offset value based on both module and internal temperatures, enabling dynamic and accurate thermal throttling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If thermal throttling is performed based on module temperature measured by external sensor, then the measurement system is simple, but the temperature measurement precision is insufficient
Solution Approach 1:
The patent divides the temperature measurement function into multiple segments: each semiconductor memory device includes its own temperature measurement circuit to measure internal temperature, while the memory module includes a module temperature sensor to measure module temperature. This segmentation enables precise internal temperature measurement without requiring a single complex centralized system.
Solution Approach 2:
The patent introduces temperature offset values as intermediaries to bridge the gap between module temperature and internal temperature. The memory controller calculates the internal temperature by adding the temperature offset value to the module temperature, enabling accurate internal temperature measurement without direct internal sensing.
2Adaptability or versatility
If fixed offset values from BIOS are used for thermal throttling, then the control method is simple, but the adaptability to different thermal characteristics is poor
Solution Approach 1:
The patent transforms the static fixed offset values into dynamic adaptive offset values. The memory controller automatically acquires and stores temperature offset values in a lookup table (LUT) based on actual temperature differences between module and internal temperatures. This enables the system to adapt to different thermal characteristics of various semiconductor memory devices while maintaining simple control logic.
3Reliability
If thermal throttling is performed without accurate internal temperature measurement, then the system operation is simple, but the reliability of preventing physical damage is reduced
Solution Approach 1:
The patent implements a feedback mechanism where the memory controller continuously monitors module temperature, retrieves temperature offset values from the LUT, calculates internal temperature, and adjusts the refresh rate accordingly. This closed-loop feedback ensures reliable prevention of physical damage by maintaining operational temperature within safe limits while adapting to actual thermal conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the risk of physical damage to semiconductor memory devices by providing accurate temperature feedback for thermal throttling, thereby enhancing the performance and lifetime of the memory module and system.
Implementation Method 1
a module temperature sensor mounted on the module substrate and configured to measure a module temperature
Implementation Method 2
a plurality of temperature measurement circuits configured to measure a plurality of internal temperatures respectively corresponding to the plurality of semiconductor memory devices
Data Source
AI summary
A memory system includes a memory module and a memory controller. The memory module includes a control device, a module temperature sensor configured to measure a module temperature and a plurality of semiconductor memory devices configured to store data. The plurality of semiconductor memory devices respectively include a plurality of temperature measurement circuits configured to measure a plurality of internal temperatures respectively corresponding to the plurality of semiconductor memory devices. The memory system is configured to generate a reference offset value based on the module temperature and the plurality of internal temperatures and perform a thermal throttling of the memory module based on the reference offset value and the module temperature. Physical damage to the semiconductor memory devices is reduced by dynamically generating the reference offset value based on the real internal temperatures of the semiconductor memory devices to perform the thermal throttling based on the reference offset value.


