Memory Device Multilevel Clock Signal Data Encoding
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Solution Overview
Problem
Memory devices face challenges in reducing the number of pins and power consumption while maintaining effective communication with external controllers, particularly in transmitting and receiving data and clock signals efficiently.
Innovation Solution
The implementation of a method and system where a clock signal and data strobe signal are generated as multilevel signals, allowing for the transmission of data, DBI, DM, CRC, or ECC data, and command/address data using pulse amplitude modulation, thereby reducing the need for separate pins and improving integration and power efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate pins are used for transmitting data and clock signals, then communication reliability is improved, but the number of pins and power consumption increase
Solution Approach 1:
The patent combines data transmission and clock signal transmission into a single pin by encoding data into the clock signal itself. The clock signal is modulated to carry both timing information and data information, allowing the memory device to receive both functions through one pin rather than requiring separate pins for each function.
Solution Approach 2:
The clock signal pin is designed to serve multiple functions: it provides both the clock timing signal and carries data information through encoding. This multi-functional approach allows the same pin to replace what would traditionally require separate dedicated pins for clock and data transmission.
2Reliability
If separate pins are used for transmitting data and clock signals, then signal integrity is improved, but power consumption increases
Solution Approach 1:
The patent merges data and clock signal transmission into a single signal path, reducing the number of active signal lines and associated power consumption. By encoding data into the clock signal's characteristics (such as duty cycle or frequency variations), the system transmits multiple types of information through one powered channel rather than multiple separate channels.
3Quantity of substance
If multilevel signals are used for transmitting data and clock signals, then the number of pins is reduced, but decoding complexity increases
Solution Approach 1:
The patent changes the parameters of the clock signal to encode data information. Instead of using a simple binary clock signal, the system employs multilevel signaling where the clock signal can assume multiple voltage levels or duty cycle values to represent different data states. This allows data to be embedded in the clock signal's characteristics rather than requiring separate data lines.
Solution Approach 2:
The patent introduces an intermediary encoding/decoding mechanism that bridges the simplified pin interface and the complex data transmission requirements. The encoder at the transmitter side converts data into modulated clock signals, and the decoder at the receiver side extracts data from the modulated signals, acting as an intermediary layer that manages the complexity while maintaining a simple external interface.
4Productivity
If multilevel signals are used for transmitting data and clock signals, then communication efficiency is improved, but signal detection difficulty increases
Solution Approach 1:
The patent utilizes parameter changes in the clock signal (such as duty cycle modulation, frequency shifts, or voltage level variations) to encode data information. By varying these parameters in a controlled manner, the system achieves efficient data transmission within the clock signal period while providing distinct detectable characteristics for different data states.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the reduction of pins and power consumption in memory devices by encoding multiple data bits into a single multilevel signal, enhancing communication efficiency and integration while maintaining data integrity.
Implementation Method 1
The controller may be configured to transmit a clock signal and a data strobe signal to the memory device, and at least one of the clock signal or the data strobe signal may be a pulse amplitude modulated signal
Data Source
AI summary
A method of operating a memory device including receiving a multilevel signal having M levels transmitted by an external controller through a clock receiving pin, where M is a natural number greater than 2, and decoding the multilevel signal to restore at least one of Data Bus Inversion (DBI) data, Data Mask (DM) data, Cyclic Redundancy Check (CRC) data, or Error Correction Code (ECC) data may be provided. The multilevel signal is a clock signal transmitted by the external controller, and is a signal swinging based on an intermediate reference signal that is an intermediate value between a minimum level and a maximum level among the M levels.