Memory Device Negative Verify Operation Suspend Resume
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Solution Overview
Problem
Current memory devices face challenges in maintaining data reliability and program performance, particularly during suspend and resume operations, which can lead to deterioration in threshold voltage distribution and increased read latency.
Innovation Solution
The memory device incorporates a peripheral circuit and control logic that allows for the suspension and resumption of program loops with a negative verify operation and recovery pulse application, enabling improved data reliability and program performance by compensating for detrapped charges and preventing threshold voltage distribution deterioration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If suspend and resume operations are performed during programming, then data reliability and program performance are improved, but threshold voltage distribution deteriorates and read latency increases
Solution Approach 1:
The patent applies preliminary action by performing a recovery pulse operation before resuming the program loop after suspend. This recovery pulse compensates for detrapped charges that accumulate during the suspend period, preventing threshold voltage distribution deterioration before it occurs. The negative verify operation is also performed preliminarily to detect erase cell disturbance, allowing early intervention to maintain data reliability.
2Ease of operation
If suspend and resume operations are performed during programming, then read operations can be performed securely, but read latency increases
Solution Approach 1:
The patent uses feedback through the negative verify operation to detect erase cell disturbance caused by detrapped charges. This feedback mechanism allows the system to identify when suspend-resume operations have affected memory cells, enabling conditional resumption of programming only when necessary. This selective approach reduces unnecessary delays while maintaining read operation availability, thereby reducing read latency compared to always performing recovery pulses.
3Reliability
If negative verify operation and recovery pulse are applied during resume, then data reliability is enhanced, but device complexity increases
Solution Approach 1:
The patent applies parameter changes by modifying the verify operation to use negative voltages instead of conventional positive voltages. This negative verify operation changes the electrical parameters of the memory read process, enabling detection of erase cell disturbance that would be invisible to conventional verify methods. This parameter change enhances data reliability without requiring fundamental architectural changes to the memory device structure.
Data Source
AI summary
A memory device may include a plurality of memory cells, a peripheral circuit configured to perform a plurality of program loops on selected memory cells among the plurality of memory cells, each of the plurality of program loops including a program pulse application operation and a program verify operation, and control logic configured to control the peripheral circuit to suspend an nth program loop (n is a natural number equal to or greater than 1) among the plurality of program loops in response to a suspend command received during the nth program loop, and to resume the nth program loop with a negative verify operation in response to a resume command. The negative verify operation applies a negative voltage having a voltage less than a state voltage at the time of application of the resume command.