Memory Device Node Contacts With Voids
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Solution Overview
Problem
Existing memory device fabrication processes are slow and inefficient due to stringent requirements for node contact formation, leading to low manufacturing throughput and equipment utilization.
Innovation Solution
The memory device design includes node contacts with voids that are embedded in the substrate, allowing for greater contact areas and electrical connection with high ion concentration portions of active areas, enabling faster fabrication and improved electrical conductance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If stringent deposition processes are used to ensure good filling performance of node contacts, then electrical connection quality is improved, but manufacturing throughput decreases
Solution Approach 1:
The patent changes the physical parameters of the node contact structure by introducing voids and extending contact depth into the substrate. This parameter change allows the use of faster deposition processes while maintaining electrical connection quality through increased contact area with high ion concentration regions in the active area.
Solution Approach 2:
The patent extends the node contact vertically deeper into the substrate, moving from a surface-level contact to a deep embedded contact. This dimensional change increases the contact area with the active area, particularly accessing high ion concentration portions, thereby maintaining electrical quality while allowing faster fabrication.
2Productivity
If rapid deposition process is used to fabricate node contacts, then manufacturing throughput is improved, but electrical connection quality may deteriorate
Solution Approach 1:
By extending the node contact depth into the substrate, the patent compensates for potential quality issues from rapid deposition. The increased vertical dimension provides greater contact area with the active area, ensuring reliable electrical connection even when using faster deposition processes.
Solution Approach 2:
The patent introduces voids within the node contact structure, changing its physical parameters. This allows the use of rapid deposition processes while the overall contact geometry (extended depth and void configuration) ensures sufficient electrical connection quality through increased contact area with high ion concentration regions.
3Reliability
If node contacts are embedded deeper in substrate to increase contact area, then electrical conductance is improved, but fabrication complexity increases
Solution Approach 1:
The patent combines multiple functions into the node contact structure: the extended depth provides both mechanical anchoring and electrical connection, while the voids serve both as stress relief features and as indicators of successful rapid deposition. This merging of functions simplifies the overall fabrication process despite the increased contact depth.
Data Source
AI summary
A memory device is disclosed, in which node contacts extend into a substrate, where they are come into electrical connection with active areas. This allows greater contact areas between the node contacts and the active areas and electrical connection of the node contacts with high ion concentration portions of the active areas. As a result, even when voids are formed in the node contacts, the node contacts can still possess desired connection performance. For node contacts allowed to contain voids, this enables them to be fabricated faster with lower difficulty, thus increasing manufacturing throughput of the memory device.