Memory ODT Circuit Using Transistor Parasitic Resistance
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in achieving high linearity and compact size due to the limitations of titanium nitride (TiN) resistors, which cannot be reduced in size and cause issues with routing between transistors.
Innovation Solution
Utilizing parasitic resistances of transistors as on-die termination (ODT) circuits by integrating conductive layers and vias to form resistors, allowing for reduced size and enhanced linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TiN resistors are used for ODT circuits, then linearity is improved, but device area increases and routing complexity worsens
Solution Approach 1:
The patent extracts the resistance function from dedicated TiN resistor components and relocates it to the inherent parasitic resistance of existing transistor structures. By taking out the separate resistor component and using the transistor's on-resistance instead, the design achieves linearity without requiring additional device area for discrete resistors.
Solution Approach 2:
The transistor serves multiple functions: it acts as both the switching element and the termination resistor. The on-resistance of the transistor is utilized as the ODT element, making the transistor universal for both logic operation and impedance matching, thereby eliminating the need for separate resistor components and reducing overall device area.
2Reliability
If TiN resistors are used for ODT circuits, then linearity is improved, but routing complexity increases
Solution Approach 1:
The patent merges the transistor and resistor functions into a single component. The ODT resistance is implemented using the transistor's on-resistance, combining the switching function and termination function in one element. This merging eliminates separate routing paths for resistors and reduces the overall routing complexity of the circuit.
3Area of stationary object
If transistor parasitic resistance is used for ODT, then device area is reduced, but manufacturing precision requirements increase
Solution Approach 1:
The patent changes the parameter control approach from material composition (TiN resistor thickness and area) to geometric dimensions (transistor width and length). By controlling the transistor's W/L ratio, the on-resistance can be precisely adjusted. This parameter change allows for better control through standard semiconductor fabrication processes while reducing device area.
4Ease of manufacture
If TiN resistors are used, then ease of manufacture is maintained, but device area and routing complexity worsen
Solution Approach 1:
The transistor structure provides its own resistance function through its inherent parasitic on-resistance. The transistor serves itself by utilizing its own physical properties (channel resistance) to fulfill the ODT requirement, eliminating the need for separate resistor components. This self-service approach maintains ease of manufacture while reducing device area.
Data Source
AI summary
A semiconductor component for a memory device is provided. The semiconductor component comprises a first active region extending in a first direction; a second active region extending in the first direction; a first conductive layer disposed across the first active region and the second active region, in a second direction substantially perpendicular to the first direction; a second conductive layer extending in the first direction; and a first conductive via connecting the first conductive layer and the second conductive layer.