Multi-Rank Memory ODT Control for Signal Integrity and Lower Power
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Solution Overview
Problem
On-die termination (ODT) in semiconductor integrated circuits enhances signal integrity but increases power consumption, necessitating a method to reduce power consumption while maintaining signal integrity.
Innovation Solution
Implementing a method where ODT circuits are enabled in an initial state during power-on, enabled during write operations for target memory ranks, and disabled during read operations, while remaining enabled for non-target memory ranks, allowing for static ODT control and reduced power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ODT circuits are enabled to enhance signal integrity, then signal reflection is reduced, but power consumption is increased
Solution Approach 1:
The ODT circuit transitions from a static enabled/disabled state to a dynamic state with multiple resistance values (high impedance, low impedance, and disabled states). The circuit can switch between these states based on operation type (read/write) and rank activity, allowing optimization of both signal integrity and power consumption under different operating conditions
Solution Approach 2:
Different ODT resistance values are applied to different memory ranks based on their activity state. Active ranks use low impedance for signal integrity, while inactive ranks use high impedance or disabled states to reduce power consumption. This localized differentiation resolves the contradiction by applying termination only where and when needed
2Reliability
If ODT circuits are enabled during read operations for all ranks, then signal integrity is maintained, but standby power consumption is increased
Solution Approach 1:
The ODT circuit resistance value is dynamically changed based on operation type and rank activity. During read operations, the read target rank uses high impedance state to reduce power consumption while non-target ranks use low impedance state to maintain signal integrity. This parameter change resolves the contradiction by adapting resistance values to specific operational requirements
Data Source
AI summary
A method of controlling on-die termination (ODT) in a multi-rank system including a plurality of memory ranks is provided. The method includes: enabling ODT circuits of the plurality of memory ranks into an initial state when the multi-rank system is powered on; enabling the ODT circuits of a write target memory rank and non-target memory ranks among the plurality of memory ranks during a write operation; and disabling the ODT circuit of a read target memory rank among the plurality of memory ranks while enabling the ODT circuits of non-target memory ranks among the plurality of memory ranks during a read operation.