Multi-Die Nonvolatile Memory ODT Using a Representative Die

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Solution Overview

Problem

Existing semiconductor memory devices face challenges in efficiently performing on-die termination (ODT) operations due to impedance mismatching, leading to signal noise and reduced signal integrity, which existing technologies have not adequately addressed.

Innovation Solution

A nonvolatile memory device configuration where at least one memory die acts as a representative die to perform ODT operations during data write or read operations, eliminating the need for additional ODT control signals and commands, and simplifying wiring by sharing ODT control signals among memory dies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional ODT operation is performed in multi-die memory devices, then signal integrity can be improved, but device complexity and control signal wiring increase

Engineering Contradiction:
Improvesignal integrityVSAvoidcontrol signal wiring
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the ODT control functionality into the existing command structure by utilizing the /CAS signal that is already present for normal memory operations. Instead of adding separate ODT control wiring, the invention combines ODT activation with the existing command bus, thereby maintaining signal integrity while reducing device complexity and wiring requirements

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The /CAS signal serves dual purposes: it controls both normal memory read/write operations and ODT activation. By making the command signal universal, the patent eliminates the need for dedicated ODT control wiring while allowing any memory die to perform ODT operations when selected as the representative die

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If separate ODT control signals are added for each memory die, then ODT operation can be controlled precisely, but access time increases

Engineering Contradiction:
ImproveODT control precisionVSAvoidaccess time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent maintains continuous ODT operation during data transfer by keeping the termination resistor activated throughout the entire read/write process. The ODT is not turned on and off separately but continues to operate alongside normal memory operations, eliminating additional timing cycles and maintaining precise control without increasing access time

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The ODT circuit is pre-configured and ready to operate before data transfer begins. When a memory die is selected for ODT operation, the termination resistor is already in place and can be activated immediately through the command signal, eliminating the need for preliminary setup time or sequential activation delays

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUSRE49206E1Nonvolatile memory device, memory system including the same and method of operating the same
Publication Date: 2022.09.06 SAMSUNG ELECTRONICS CO LTD
  • USRE49206E1 patent drawing
  • USRE49206E1 patent drawing
  • USRE49206E1 patent drawing

AI summary

A nonvolatile memory device includes a first memory structure. The first memory structure includes first through N-th memory dies that may be connected to an external memory controller via a first channel. N is a natural number equal to or greater than two. At least one of the first through N-th memory dies is configured to be used as a first representative die that performs an on-die termination (ODT) operation while a data write operation is performed for one of the first through N-th memory dies.