Independent On-Die Termination Control for Memory Signal Timing

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Solution Overview

Problem

Existing signal transmitting and receiving apparatuses and memory devices face performance degradation due to the simultaneous enablement and disablement of on-die termination circuits, which leads to preamble and postamble times that hinder efficient signal transmission and reception.

Innovation Solution

The apparatus includes independent control over the enable and disable timing of first and second on-die termination circuits connected to different pins, allowing the second circuit to be enabled only after the first, thereby preventing performance degradation caused by these times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If on-die termination circuits are simultaneously enabled for impedance matching, then signal integrity is improved, but preamble time increases causing performance degradation

Engineering Contradiction:
Improvesignal integrityVSAvoidpreamble time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the termination control into separate circuits for different signal types (data signals and strobe signals). The first on-die termination circuit handles data signals while the second handles strobe signals, allowing independent enable/disable timing for each circuit based on their specific signal requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic control of termination circuits by enabling and disabling them at different times based on signal type. The control circuit dynamically adjusts the enable timing of each termination circuit to match the specific preamble requirements of data signals versus strobe signals, optimizing both signal integrity and performance.

Inventive Principle:
Principle #15Dynamics

2Loss of time

If on-die termination circuits are simultaneously disabled, then postamble time is reduced, but signal reflection occurs during transition

Engineering Contradiction:
Improvepostamble timeVSAvoidsignal integrity
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent divides the termination control into separate circuits for different signal types, allowing each circuit to be disabled at its optimal time. The first termination circuit for data signals and the second for strobe signals can be independently managed during the postamble phase, reducing overall postamble time while maintaining signal integrity for each signal type.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The control circuit dynamically manages the disable timing of each termination circuit based on the specific postamble requirements of different signal types. This dynamic approach allows the system to minimize postamble time while preventing signal reflection by keeping each termination circuit enabled until its specific signal transition is complete.

Inventive Principle:
Principle #15Dynamics

3Productivity

If independent control of termination circuits is implemented, then system performance is improved, but device complexity increases

Engineering Contradiction:
Improvesignal transmission efficiencyVSAvoidcontrol circuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the termination control function into separate dedicated circuits for different signal types. This segmentation provides independent control capability that improves signal transmission efficiency for each signal type while keeping each individual control circuit relatively simple and manageable.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11245397B2Apparatus for transmitting and receiving a signal, a method of operating the same, a memory device, and a method of operating the memory device
Publication Date: 2022.02.08 SAMSUNG ELECTRONICS CO LTD
  • US11245397B2 patent drawing
  • US11245397B2 patent drawing
  • US11245397B2 patent drawing

AI summary

A signal transmitting and receiving apparatus including: a first on-die termination circuit connected to a first pin through which a first signal is transmitted or received and, when enabled, the first on-die termination circuit is configured to provide a first termination resistance to a signal line connected to the first pin; a second on-die termination circuit connected to a second pin through which a second signal is transmitted or received and, when enabled, the second on-die termination circuit is configured to provide a second termination resistance to a signal line connected to the second pin; and an on-die termination control circuit configured to independently control an enable time and a disable time of each of the first on-die termination circuit and the second on-die termination circuit.