Memory Pre-Decoder One-Hot Transfer Across Dual-Voltage Regions
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in reducing energy consumption and area overhead due to the transfer of pre-decode signals between different power supply regions, particularly when the level shifter is located near the non-volatile memory part and the operating voltage is high, leading to increased power consumption.
Innovation Solution
The semiconductor memory device incorporates a pre-decoder that generates a one-hot signal in the peripheral circuit part, which is then transferred to the core circuit part using a level shifter, allowing the memory cell array to operate based on this signal, thereby reducing energy consumption and area overhead by minimizing the need for constant signal charging and discharging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the level shifter is located near the non-volatile memory part to transfer pre-decode signals, then signal transfer capability is improved, but energy consumption increases due to high operating voltage
Solution Approach 1:
The pre-decode signal transfer function is segmented into two parts: (1) one-hot signal generation in the peripheral circuit at low voltage, and (2) selective amplification only when data transition occurs. This segmentation avoids continuous high-voltage signal transfer, reducing power consumption while maintaining signal transfer capability.
Solution Approach 2:
The level shifter operates periodically based on data transition detection rather than continuously. The control circuit detects transitions in the one-hot signal and activates the level shifter only during these transition periods, converting continuous power consumption into periodic operation that reduces overall energy usage.
2Ease of operation
If conventional pre-decode signals are transferred between power supply regions, then circuit operation is maintained, but area overhead increases due to constant signal charging and discharging
Solution Approach 1:
The signal format is changed from conventional multi-bit pre-decode signals to one-hot encoded signals. This parameter change in signal representation reduces the number of signal lines required and minimizes capacitive loading, thereby reducing area overhead while maintaining full circuit operation capability.
Solution Approach 2:
Instead of transferring all pre-decode signal lines between power supply regions, only the essential one-hot signal is copied and transferred. This selective signal copying approach reduces the number of signal lines and associated wiring area, decreasing area overhead while preserving necessary circuit functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses energy consumption associated with signal transfer and area overhead by using the one-hot signal to operate across circuit parts with different power supplies, enhancing the efficiency of the semiconductor memory device.
Implementation Method 1
a level shifter supplied with the first voltage and the second voltage and transferring the one-hot signal from the first wiring in the peripheral circuit part to the second wiring in the core circuit part
Data Source
AI summary
A semiconductor memory device according to an embodiment includes a peripheral circuit part supplied with a first voltage, a core circuit part supplied with a second voltage greater than the first voltage, a pre-decoder provided in the peripheral circuit part, input with a signal and outputting a one-hot signal corresponding to the signal, a first wiring provided in the peripheral circuit part, electrically connected to the pre-decoder, and supplied with the one-hot signal, a second wiring provided in the core circuit part, a level shifter provided in the peripheral circuit part, supplied with a first voltage and a second voltage, and transferring the one-hot signal from the first wiring in the peripheral circuit part to the second wiring in the core circuit part, and a memory cell array provided in the core circuit part and operating based on the transferred one-hot signal.