Semiconductor Memory Open Layers for Defective-Cell Leakage
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Solution Overview
Problem
High-performance semiconductor devices face issues with leakage current due to defective memory cells causing short failures, which disrupt normal operation and require improved methods to manage current flow and maintain device integrity.
Innovation Solution
Incorporation of an open layer between memory cells and conductive lines that transitions to an open circuit state upon exceeding a threshold current, blocking current flow through defective cells and minimizing leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory cells are disposed at intersection regions of conductive lines to achieve high integration, then device capacity increases, but leakage current increases due to defective memory cells causing short failures
Solution Approach 1:
An open layer is introduced as an intermediary component between the memory cell and the conductive lines. This open layer acts as a mediator that can dynamically control current flow - remaining conductive during normal operation to maintain device functionality, but transitioning to an open circuit state when excessive current is detected, thereby blocking leakage current from defective memory cells while preserving the high integration structure
2Object-generated harmful factors
If current flow is blocked through defective memory cells to reduce leakage, then leakage current decreases, but normal memory cell operation may be disrupted
Solution Approach 1:
The open layer is designed with dynamic conductivity characteristics, transitioning between conductive and open circuit states based on current conditions. During normal operation when current remains below a threshold, the open layer maintains conductivity to ensure proper memory cell function. When excessive current indicative of a defective cell is detected, the open layer dynamically switches to an open circuit state to block leakage, thereby adapting its behavior to operational conditions and preserving overall system reliability
3Object-generated harmful factors
If a layer capable of generating voids through electromigration is used to block current in defective cells, then leakage current is reduced, but the layer must be precisely controlled to avoid affecting normal cells
Solution Approach 1:
The open layer is positioned and configured with specific local characteristics - it is disposed between the memory cell and the conductive lines at precise locations where current monitoring is needed. The layer's material composition and geometric dimensions are optimized locally to ensure that electromigration-induced void formation occurs only under excessive current conditions specific to defective cells, while normal operating currents pass through without triggering void formation, thereby achieving selective current blocking without requiring excessive manufacturing precision across the entire device
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The open layer effectively reduces leakage current, ensuring normal memory cells operate optimally by preventing current flow through defective cells, thereby enhancing the semiconductor device's operating characteristics.
Implementation Method 1
the layer includes a conductive material that is capable of generating a void to create an open circuit by electromigration when a current applied to the layer through the first conductive line and the second conductive line exceeds a threshold current
Data Source
AI summary
A semiconductor device may include: a plurality of first conductive lines extending in a first direction; a plurality of second conductive lines extending in a second direction; a plurality of memory cells respectively disposed at intersection regions between the first conductive lines and the second conductive lines; and a layer formed between each memory cell and at least one of a first conductive line and an intersecting second conductive line between which the memory cell is located, wherein the layer includes a conductive material that is capable of generating a void to create an open circuit by electromigration when a current applied to the layer through the first conductive line and the second conductive line exceeds a threshold current and is electrically conductive when the current applied to the layer through the first conductive line and the second conductive line is below the threshold current.


